Video coding with successive codecs

US11323749B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11323749-B2
Application numberUS-202017062110-A
CountryUS
Kind codeB2
Filing dateOct 2, 2020
Priority dateApr 2, 2018
Publication dateMay 3, 2022
Grant dateMay 3, 2022

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A video coding mechanism is disclosed. The mechanism includes at least one pre-encoder configured to pre-encode a received input video signal, and output a pre-encoded video signal. The mechanism also includes an encoder configured to obtain the pre-encoded video signal from the pre-encoder, and encode the pre-encoded video signal as a bitstream for transmitting the bitstream to decoder for decoding.

First claim

Opening claim text (preview).

The invention claimed is: 1. A video coding device, comprising: at least one pre-encoder configured to: obtain an input video signal, pre-encode the input video signal, and output a pre-encoded video signal; and an encoder configured to: obtain the pre-encoded video signal from the at least one pre-encoder, and encode the pre-encoded video signal as a bitstream, wherein the bitstream is used to be transmitted to a decoder for decoding, wherein the at least one pre-encoder includes a remapping component, and wherein a function applied by the remapping component includes: I″=SLF (InversePQ( I )) when I is a PQ signal, or I″=SLF (InverseHLG( I )) when I is an HLG signal wherein SLF ⁡ ( I ′ ) = a × ( p × I ′ ( p - 1 ) × I ′ + 1.0 ) m + b , wherein I is the input video signal, I″ is the pre-encoded video signal, InversePQ is an inverse perceptual quantize (PQ) transfer function, InverseHLG is an inverse hybrid log gamma (HLG) transfer function, SLF(I′) is a non-linear function (SLF) applied to an inverse PQ or HLG function, and a, b, m, and p are constants. 2. The video coding device of claim 1 , wherein the at least one pre-encoder is configured to perform modifications to the input video signal, where the modifications allow the input video signal to be reconstructed after reversing the modifications at a post-decoder. 3. The video coding device of claim 1 , wherein the remapping component is configured to pre-encode the input video signal by applying one or more of: a function to change a maximum value of the input video signal, a function to change a minimum value of the input video signal, and a function to shift an average value of the input video signal, so as to compress the input video signal. 4. The video coding device of claim 1 , wherein a and b are both equal to 1.12762; m equals 0.14 and p equals 1.4 when I is a PQ signal; and m equals 0.3 and p equals 2.3 when I is an HLG signal. 5. The video coding device of claim 1 , wherein the at least one pre-encoder is configured to forward side information to the encoder for encoding the side information in the bitstream, the side information including signal features of the input video signal prior to pre-encoding. 6. A video coding device, comprising: at least one decoder configured to: decode a bitstream to obtain a decoded video signal, and output the decoded video signal; and at least one post-decoder configured to: obtain the decoded video signal from the at least one decoder, post-decode the decoded video signal, and output a reconstructed video signal for display, wherein the at least one post-decoder includes an inverse remapping component, and wherein a function applied by the inverse remapping component includes: I =PQ(InverseSLF( I ′)) when I is a PQ signal or I =HLG(InverseSLF( I ′)) when I is an HLG signal wherein, inverseSLF ⁡ ( I ′ ) ⁢ = 1 p × ( I ′ - b a ) - 1 m - p + 1.0 wherein I is the reconstructed video signal, I′ is the decoded video signal, PQ (InverseSLF) is a perceptual quantize (PQ) transfer function, HLG (InverseSLF) is a hybrid log gamma (HLG) transfer function, inverseSLF(I′) is an inverse non-linear function (SLF), and a, b, m, and p are constants. 7. The video coding device of claim 6 , wherein the video coding device includes a cascade of decoders and post-decoders, wherein the cascade of decoders and post-decoders includes N decoders and post-decoders, and N is an integer larger than one, and at least one of the decoders comprises entropy decoding functions capable of decoding the bitstream to obtain the decoded video signal, and wherein the decoded video signal is more compact than the reconstructed video signal. 8. The video coding device of claim 6 , wherein the inverse remapping component is configured to post-decode the decoded video signal by applying one or more of: a function to change a maximum value and of the decoded video signal, a function to change a minimum value of the decoded video signal, and a function to shift an average value of the decoded video signal, so as to de-compress the decoded video signal. 9. The video coding device of claim 6 , wherein a and b are both equal to 1.12762; m equals 0.14 and p equals 1.4 when I is a PQ signal; and m equals 0.3 and p equals 2.3 when I is an HLG signal. 10. The video coding device of claim 8 , wherein the inverse remapping component is configured to post-decode the decoded video signal based on side information obtained from the bitstream, the side information including signal features used to reconstruct the video signal by the at least one post-decoder. 11. The video coding device of claim 10 , wherein the side information

Assignees

Inventors

Classifications

  • H04N19/85Primary

    using pre-processing or post-processing specially adapted for video compression · CPC title

  • the unit being a colour or a chrominance component · CPC title

  • Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC] · CPC title

  • H04N19/98Primary

    Adaptive-dynamic-range coding [ADRC] · CPC title

  • characterised by syntax aspects related to video coding, e.g. related to compression standards · CPC title

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What does patent US11323749B2 cover?
A video coding mechanism is disclosed. The mechanism includes at least one pre-encoder configured to pre-encode a received input video signal, and output a pre-encoded video signal. The mechanism also includes an encoder configured to obtain the pre-encoded video signal from the pre-encoder, and encode the pre-encoded video signal as a bitstream for transmitting the bitstream to decoder for dec…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04N19/85. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 03 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).