Packet processing technique for a communication network

Patent metadata

Field	Value
Publication number	US-11323384-B2
Application number	US-201616321003-A
Country	US
Kind code	B2
Filing date	Jul 26, 2016
Priority date	Jul 26, 2016
Publication date	May 3, 2022
Grant date	May 3, 2022

Abstract

A system comprising one or more network elements and configured to process at least first and second packet flows. The system comprises a first packet gate selectively switchable between an open state for packet transmission and a closed state and an associated first packet queue. The first packet gate and the first packet queue are configured to handle first packet flow packets. The system further comprises a second packet queue configured to handle second packet flow packets. Moreover, the system comprises at least one processor configured to control switching of the first packet gate between the open state and the closed state based on the occurrence of a first event associated with the second packet queue to trigger transmission of the first packet flow packets in a relative transmission order among the first packet flow packets and the second packet flow packets.

First claim

The invention claimed is:

1. A system comprising one or more network elements, having a plurality of packet gates to handle packet flow, and configured to process at least a first packet flow and a second packet flow, the system comprising:
a first packet gate selectively switchable between an open state for packet transmission and a closed state for non-transmission;
a first packet queue, wherein the first packet gate and the first packet queue are configured to handle first packet flow packets;
a second packet queue configured to handle second packet flow packets;
a mask having a plurality of binary values, in which a value of each binary value of the plurality of binary values to identify switching operation of a respective packet gate of the plurality of the packet gates, wherein a first value indicates time-based switching and a second value indicates switching responsive to an occurrence of an event; and
at least one processor configured to control switching of the first packet gate between the open state and the closed state based on a respective binary value of the mask for the first packet gate, wherein when the respective binary value of the mask for the first packet gate has the first value, the at least one processor controls switching of the first packet gate in a time-based manner and wherein when the respective binary value of the mask for the first packet gate has the second value, an occurrence of a first event associated with the second packet queue triggers the first packet gate to switch to the open state for a predetermined duration for transmission of the first packet flow packets in a relative transmission order among the first packet flow packets and the second packet flow packets.

2. The system of claim 1 , wherein the system further comprises:
a second packet gate, selectively switchable between the open state for packet transmission and the closed state for non-transmission, and associated with the second packet queue, the second packet gate configured to handle the second packet flow packets.

3. The system of claim 2 , wherein the second packet gate is constantly in the open state.

4. The system of claim 2 , wherein the at least one processor is further configured to control switching of the second packet gate between the open state and the closed state based on a binary value of the mask for the second packet gate.

5. The system of claim 4 , wherein the at least one processor is configured to control switching of the second packet gate between the open state and the closed state based on an occurrence of a second event associated with the first packet queue, when the binary value of the mask for the second packet gate has the second value.

6. The system of claim 5 , wherein at least one of the first event and the second event is a packet arrival at the associated packet queue.

7. The system of claim 5 , wherein at least one of the first event and the second event is a packet bypassing the associated packet queue.

8. The system of claim 2 , wherein the at least one processor is configured to select a predetermined number of second packet flow packets for transmission via the second packet gate in the open state of the second packet gate.

9. The system of claim 1 , wherein the at least one processor is configured to select a predetermined number of first packet flow packets for transmission via the first packet gate in the open state of the first packet gate.

10. The system of claim 1 , wherein the at least one processor configured to control switching of the first packet gate between the open state and the closed state is further configured to control the first packet gate to periodically switch from the closed state to the open state, when operating in the time-based manner based on the mask.

11. A network controller configured to control processing of at least a first packet flow and a second packet flow by a system having a plurality of packet gates to handle packet flow, wherein the network controller uses a mask to identify a manner of switching of the plurality of packet gates between time-based switching and switching responsive to an occurrence of an event, in which the system having a first packet gate, selectively switchable between an open state for packet transmission and a closed state for non-transmission, is associated with a first packet queue to handle first packet flow packets, and the system having a second packet queue configured to handle second packet flow packets, the network controller comprising:
at least one processor configured to determine transmission order information defining a relative, transmission order among the first packet flow packets and the second packet flow packets and to determine the manner of switching of the first packet gate by determining a respective binary value for the first packet gate from the mask having a plurality of binary values, in which a value of each binary value of the plurality of binary values identities switching operation of a respective packet gate of the plurality of the packet gates, wherein a first value indicates time-based switching and a second value indicates switching responsive to an occurrence of an event; and
an interface configured to send the transmission order information to the system, wherein the transmission order information is configured responsive to, when the respective binary value of the mask for the first packet gate has the first value, the at least one processor controls switching of the first packet gate in a time-based manner and when the respective binary value of the mask for the first packet gate has the second value, an occurrence of a first event associated with the second packet queue triggers the first packet gate to switch to the open state for a predetermined duration for transmission of the first packet flow packets and the second packet flow packets in the relative transmission order.

12. The network controller of claim 11 , wherein the interface is configured to send first event information on the occurrence of the first event associated with the second packet queue to the system.

13. The network controller of claim 11 , wherein
the system comprises a second packet gate, selectively switchable between the open state for packet transmission and the closed state for non-transmission, and associated with the second packet queue, the second packet gate configured to handle the second packet flow packets, and
the transmission order information is configured to cause switching of the second packet gate between the open state and the closed state.

14. The network controller of claim 13 , wherein switching of the second packet gate is based on an occurrence of a second event associated with the first packet queue, when the binary value of the mask for the second packet gate has the second value.

15. The network controller of claim 14 , wherein the interface is configured to send second event information on the occurrence of the second event associated with the first packet queue to the system.

16. The network controller of claim 11 , wherein the network controller is configured to send the transmission order information to multiple network elements in the system to define the same packet order throughout a communication network.

17. A method of operating a system comprising one or more network elements and configured to process at least a first packet flow and a second packet Dow, in which the system has a plurality of packet gates to handle packet flow the method comprising:
determining a respective binary value for a first packet gate from a mask having a

Assignees

• Ericsson Telefon Ab L M

Inventors

• Farkas János
• Ruffini Stefano
• Varga Balázs
• Simon Csaba
• Moldován István

Classifications

• H04L47/245

  using preemption · CPC title

• H04L47/621 Primary

  Individual queue per connection or flow, e.g. per VC · CPC title

• H04L47/627

  policing · CPC title

• H04L47/6275

  based on priority · CPC title

• H04L47/58

  Changing or combining different scheduling modes, e.g. multimode scheduling · CPC title