Impedance compensation system with microstrip and slotline coupling and controllable capacitance

Patent metadata

Field	Value
Publication number	US-11322844-B2
Application number	US-202016838671-A
Country	US
Kind code	B2
Filing date	Apr 2, 2020
Priority date	Apr 23, 2019
Publication date	May 3, 2022
Grant date	May 3, 2022

Abstract

Embodiments of a circuit, system, and method are disclosed. In an embodiment, a circuit includes a first microstrip transmission line, a second microstrip transmission line, and a slotline formation, wherein the slotline formation extends between the first microstrip transmission line and the second microstrip transmission line so that the slotline formation is configured to electromagnetically couple the first microstrip transmission line to the second microstrip transmission line during operation of the circuit. In addition, the circuit includes at least one controllable capacitance circuit electrically connected to at least one of the first microstrip transmission line and the second microstrip transmission line, wherein a magnitude of capacitance of the at least one controllable capacitance circuit is controllable (e.g., in response to a capacitance control signal received at a control interface).

First claim

What is claimed is:

1. A circuit comprising:
a first microstrip transmission line;
a second microstrip transmission line;
a slotline formation,
wherein the slotline formation extends between the first microstrip transmission line and the second microstrip transmission line to so that the slotline formation is configured to electromagnetically couple the first microstrip transmission line to the second microstrip transmission line during operation of the circuit; and
at least one controllable capacitance circuit electrically connected to at least one of the first microstrip transmission line and the second microstrip transmission line, wherein a magnitude of capacitance of the at least one controllable capacitance circuit is controllable;

wherein the at least one controllable capacitance circuit comprises:
a first controllable capacitance circuit electrically connected to the first microstrip transmission line and including a first control interface, wherein a magnitude of capacitance of the first controllable capacitance circuit is controllable in response to a first capacitance control signal received at the first control interface; and
a second controllable capacitance circuit electrically connected to the second microstrip transmission line and including a second control interface, wherein a magnitude of capacitance of the second controllable capacitance circuit is controllable in response to a second capacitance control signal received at the second control interface.

2. The circuit of claim 1 , wherein:
the first microstrip transmission line includes an open stub, and the first controllable capacitance circuit is electrically connected to the first microstrip transmission line at the open stub of the first microstrip transmission line; and
the second microstrip transmission line includes an open stub, and the second controllable capacitance circuit is electrically connected to the second microstrip transmission line at the open stub of the second microstrip transmission line.

3. The circuit of claim 1 , wherein the at least one controllable capacitance circuit is controlled in response to a digital capacitance control signal received at a control interface of the at least one controllable capacitance circuit.

4. The circuit of claim 1 , wherein the at least one controllable capacitance circuit comprises:
a first digitally controllable capacitance circuit electrically connected to the first microstrip transmission line and including a first control interface, wherein a magnitude of capacitance of the first digitally controllable capacitance circuit is controllable in response to a first digital capacitance control signal received at the first control interface; and
a second digitally controllable capacitance circuit electrically connected to the second microstrip transmission line and including a second control interface, wherein a magnitude of capacitance of the second digitally controllable capacitance circuit is controllable in response to a second digital capacitance control signal received at the second control interface.

5. The circuit of claim 1 , wherein a portion of the first microstrip transmission line intersects a portion of the slotline formation from a plan view perspective, and wherein a portion of the second microstrip transmission line intersects a portion of the slotline formation from a plan view perspective.

6. The circuit of claim 5 , wherein:
the first microstrip transmission line includes an open stub, and the first microstrip transmission line intersects the portion of the slotline formation near the open stub of the first microstrip transmission line; and
the second microstrip transmission line includes an open stub, and the second microstrip transmission line intersects the portion of the slotline formation near the open stub of the second microstrip transmission line.

7. The circuit of claim 5 , wherein the intersecting portions of the first microstrip transmission line and the slotline formation are separated by a dielectric layer, and wherein the intersecting portions of the second microstrip transmission line and the slotline formation are separated by a dielectric layer.

8. The circuit of claim 7 , further comprising a printed circuit board (PCB), wherein the slotline formation is formed as a gap in a conductive layer of the PCB.

9. The circuit of claim 8 , wherein a linear portion of the gap of the slotline formation extends perpendicular to a portion of the first microstrip transmission line and to a portion of the second microstrip transmission line.

10. The circuit of claim 9 , wherein the gap of the slotline formation includes a first rounded end portion at a first end of the linear portion, and a second rounded end portion at a second end of the linear portion.

11. The circuit of claim 1 , wherein the first microstrip transmission line includes an L-shaped portion with a first linear portion and a second linear portion that is substantially perpendicular to the first linear portion, and wherein the second microstrip transmission line includes an L-shaped portion with a third linear portion and a fourth linear portion that is substantially perpendicular to the third linear portion.

12. The circuit of claim 11 , wherein:
the first microstrip transmission line includes an open stub, and the first microstrip transmission line intersects a portion of the slotline formation near the open stub of the first microstrip transmission line; and
the second microstrip transmission line includes an open stub, and the second microstrip transmission line intersects a portion of the slotline formation near the open stub of the second microstrip transmission line.

13. The circuit of claim 1 , wherein the first microstrip transmission line and the second microstrip transmission line are coplanar.

14. The circuit of claim 1 , wherein the first microstrip transmission line and the second microstrip transmission line are on different planes.

15. A radio frequency (RF) front-end comprising the circuit of claim 1 .

16. A system comprising:
a first microstrip transmission line;
a second microstrip transmission line;
a slotline formation,
wherein the slotline formation extends between the first microstrip transmission line and the second microstrip transmission line to electromagnetically couple the first microstrip transmission line to the second microstrip transmission line; and

at least one controllable capacitance circuit electrically connected to at least one of the first microstrip transmission line and the second microstrip transmission line and including a control interface, wherein a magnitude of capacitance of the at least one controllable capacitance circuit is controllable in response to a capacitance control signal received at the control interface; wherein the at least one controllable capacitance circuit comprises:
a first controllable capacitance circuit electrically connected to the first microstrip transmission line and including a first control interface wherein a magnitude of capacitance of the first controllable capacitance circuit is controllable in response to a first capacitance control signal received at the first control interface; and
a second controllable capacitance circuit electrically connected to the second microstrip transmission line and including a second control interface, wherein a magnitude of capacitance of the second controllable capacitance circuit is controllable in response to a second capacitance control signal received at the second control interface.

17. A method for providing impeda

Assignees

• Nxp Usa Inc

Inventors

• Nikolayenkov Oleksandr
• Tucker Geoffrey
• Beuttner Martin

Classifications

• H10W44/248

  for antennas · CPC title

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H10W44/601 Primary

  Capacitive arrangements (H10W44/20 takes precedence) · CPC title

• H01Q23/00

  Antennas with active circuits or circuit elements integrated within them or attached to them · CPC title

• H04B1/18

  Input circuits, e.g. for coupling to an antenna or a transmission line (coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H) · CPC title