Thin film transistor substrate and liquid crystal display panel

Patent metadata

Field	Value
Publication number	US-11314134-B2
Application number	US-202117147772-A
Country	US
Kind code	B2
Filing date	Jan 13, 2021
Priority date	Apr 20, 2018
Publication date	Apr 26, 2022
Grant date	Apr 26, 2022

Abstract

A thin film transistor substrate of reduced repaired line length and capacitance includes first repairing lines, data lines and second repairing lines insulated from each other. If one of the data lines is broken, the first repairing lines is electrically coupled to the input end of the broken data line, the second repairing line is electrically coupled to the output end of the broken data line, and the first repairing is electrically coupled to the second repairing line.

First claim

What is claimed is:

1. A thin film transistor substrate, comprising:
a substrate defining a central area and a peripheral area surrounding the central area;
a plurality of data lines formed on the substrate;
wherein each of the plurality of data lines extends through the central area in a first direction, each of the plurality of data lines comprises an output end and an input end at the peripheral area;
the thin film transistor substrate further comprises at least one first repairing line, a plurality of second repairing lines and a plurality of connecting lines located at the peripheral area; the at least one first repairing line, the plurality of second repairing lines and the plurality of connecting lines are insulated from the plurality of data lines;
a projection of each of the plurality of second repairing line on the substrate at least partially overlaps with the output end of at least one of the plurality of data lines; a projection of each of the at least one first repairing line on the substrate at least partially overlaps with at least one of the plurality of second repairing lines; a projection of each of the at least one first repairing line on the substrate at least partially overlaps with at least one of the plurality of the connecting lines; each of the plurality of the connecting lines at least partially overlaps with the input end of at least one of the plurality of data lines;
if one of the plurality of data lines is broken, the input end of the broken data line is coupled with one of the plurality of connecting lines overlapping with a projection of the broken data line on the substrate, the output end of the broken data line is coupled with one of the plurality of second repairing line overlapping with the projection of the broken data line on the substrate, and the connecting line coupled with the input end of the broken data line is coupled with the second repairing line coupled with the output end of the broken data line through one of the at least one of first repairing line.

2. The thin film transistor substrate of claim 1 , wherein the thin film transistor substrate comprises one first repairing line; the plurality of data lines is divided into a first group of data lines and a second group of data lines; the plurality of connecting lines comprise two first connecting lines and one second connecting line;
a projection of one of the two first connecting lines on the substrate at least partially overlaps with the input ends of all the data lines of the first group; a projection of the other one of the two first connecting lines on the substrate at least partially overlaps with the input ends of all the data lines of the second group;
a projection of the second connecting line on the substrate at least partially overlaps with the input ends of all the data lines of the first group and the second group;
a projection of each of the plurality of second repairing line on the substrate at least partially overlaps with the output end of one of the at least one of the plurality of data lines;
a projection of the first repairing line on the substrate at least partially overlaps with the plurality of second repairing lines; and
the projection of the first repairing line on the substrate at least partially overlaps with the second connecting line and one of the two first connecting lines.

3. The thin film transistor substrate of claim 1 , wherein the thin film transistor substrate comprises one first repairing line; the plurality of data lines is divided into a first group of data lines and a second group of data lines; the plurality of connecting lines comprise one first connecting line and at least one second connecting line;
a projection of the first connecting line on the substrate at least partially overlaps all the data lines of the first group; a projection of the at least one second connecting line on the substrate at least partially overlaps all the data lines of the second group;
a projection of each of the plurality of second repairing line on the substrate at least partially overlaps with the output end of one of the at least one of the plurality of data lines;
a projection of the first repairing line on the substrate at least partially overlaps with the plurality of second repairing lines;
the projection of the first repairing line on the substrate at least partially overlaps with the first connecting line; and
the thin film transistor substrate further comprise a driving circuit electrically connected to the plurality of data lines, the driving circuit comprise an empty area; each of the at least one second connecting line extends through the empty area, and a projection of each of the at least one second connecting line on the substrate at least partially overlaps with the first repairing line.

4. The thin film transistor substrate of claim 3 , wherein an overlapping area between the projection of the first connecting line on the substrate and the plurality of data lines is the same as an overlapping area between the projection of the second connecting line on the substrate and the plurality of data lines.

5. The thin film transistor substrate of claim 1 , wherein an overlapping area of the projection of each of the plurality of second repairing lines on the substrate and the plurality of data lines is the same.

6. The thin film transistor substrate of claim 1 , wherein a line width of a point of each of the plurality of connecting lines at which each of the plurality of connecting lines overlaps with one of the plurality of data lines is smaller than a line width of each of the plurality of connecting lines where there is no overlap with the plurality of data lines.

7. The thin film transistor substrate of claim 6 , wherein a line width of a point of each of the plurality of data lines at which each of the plurality of data lines overlaps with one of the plurality of connecting lines is larger than a line width of each of the plurality of data lines where there is no overlap with the plurality of connecting lines.

8. A liquid crystal display panel, comprising:
a thin film transistor substrate, wherein the thin film transistor substrate comprises: a substrate defining a central area and a peripheral area surrounding the central area;
a plurality of data lines formed on the substrate;
wherein each of the plurality of data lines extends through the central area in a first direction, each of the plurality of data lines has an output end and an input end at the peripheral area;
the thin film transistor substrate further comprises at least one first repairing line, a plurality of second repairing lines and a plurality of connecting lines located at the peripheral area; the at least one first repairing line, the plurality of second repairing lines and the plurality of connecting lines are insulated from the plurality of data lines;
a projection of each of the plurality of second repairing line on the substrate at least partially overlaps with the output end of at least one of the plurality of data lines; a projection of each of the at least one first repairing line on the substrate at least partially overlaps with at least one of the plurality of second repairing lines; a projection of each of the at least one first repairing line on the substrate at least partially overlaps with at least one of the plurality of the connecting lines; each of the plurality of the connecting lines at least partially overlaps with the input end of at least one of the plurality of data lines;
if one of the plurality of data lines is broken, the input end of the broken data line is coupled with one of the plurality of connecting lines overlapping with a projection of the broken data line on the substrate, the output end of the broken data line

Assignees

• Century Tech Shenzhen Corporation Limited

Inventors

• Fang Ning
• Liu Chih-Chung
• Tai Meng-Chieh

Classifications

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• G02F1/136259 Primary

  Repairing; Defects · CPC title

• G02F1/1339

  Gaskets; Spacers; Sealing of cells · CPC title

• G02F1/136263

  Line defects · CPC title