Self-testing measuring system

Patent metadata

Field	Value
Publication number	US-11313967-B2
Application number	US-202017106750-A
Country	US
Kind code	B2
Filing date	Nov 30, 2020
Priority date	Aug 9, 2017
Publication date	Apr 26, 2022
Grant date	Apr 26, 2022

Abstract

A self-testing measuring system includes at least three modes: an operating mode and at least two test modes. In a third test mode, a digital signal generating unit stimulates the digital input circuit directly by means of test signals. In a second test mode, the digital signal generating unit stimulates the analogue signal string and the digital input circuit by means of test signals. In a first test mode, the digital signal generating unit stimulates the analogue signal string, the measuring unit (typically an ultrasound transducer) and the digital input circuit by means of test signals, thereby allowing this signal string to be tested. In the operating mode, the digital signal generating unit stimulates the analogue signal string, the measuring unit (typically an ultrasound transducer) and the digital input circuit by means of output signals, thereby allowing the signal string to be monitored for parameter compliance.

First claim

The invention claimed is:

1. A self-testing measuring system (SS) comprising:
a digital signal generating unit (DSO),
a driver stage (DR),
a measuring unit (TR), which transmits an analogue output signal (MS) as a measuring signal and receives a receive signal (ES) in response thereto,
an analogue input circuit (AS),
a digital input circuit (PSI),
an analogue channel simulation unit (ACS),
a digital channel simulation unit (DCS),
an analogue multiplexer (AMX), and
a digital multiplexer (DMX),
wherein the measuring system (SS) assumes
in an operating phase an operating mode and
in a test phase, a first test mode,

wherein in the operating mode
the digital signal generating unit (DSO) generates a first digital signal (S 1 ),
the driver stage (DR) converts the first digital signal (S 1 ) of the digital signal generating unit (DSO) into a second analogue signal (S 2 ),
the second analogue signal (S 2 ) prompts the measuring unit (TR) to transmit the analogue output signal (MS) as the measuring signal into a measuring channel (CN),
the measuring unit (TR) receives the receive signal (ES) from the measuring channel (CN) depending on the analogue output signal (MS),
the measuring unit (TR) generates a third analogue signal (S 3 ) depending on the received receive signal (ES),
the analogue multiplexer (AMX) forwards the third analogue signal (S 3 ) to the analogue input circuit (AS) as a fourth analogue signal (S 4 ),
the analogue input circuit (AS) converts the fourth analogue signal (S 4 ) into a fifth digital signal (S 5 ),
the digital multiplexer (DMX) forwards the fifth digital signal (S 5 ) to the digital input circuit (DSI as a sixth digital signal (S 6 ),
the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates a seventh response signal (S 7 ), and
the seventh response signal (S 7 ) is used as a measurement result or to form the measurement result,

wherein in the first test mode
the digital signal generating unit (DSO) generates the first digital signal (S 1 ),
the driver stage (DR) converts the first digital signal (S 1 ) of the digital signal generating unit (DSO) into the second analogue signal (S 2 ),
the second analogue signal (S 2 ) prompts the measuring unit (TR) to emit the analogue output signal (MS) as the measurement signal into the measuring channel (CN),
the measuring unit (TR) receives the receive signal (ES) from the measuring channel (CN) depending on the analogue output signal (MS),
the measuring unit (TR) generates the third analogue signal (S 3 ) depending on the received receive signal (ES),
the analogue multiplexer (AMX) forwards the third analogue signal (S 3 ) to the analogue input circuit (AS) as the fourth analogue signal (S 4 ),
the analogue input circuit (AS) converts the fourth analogue signal (S 4 ) into the fifth digital signal (S 5 ),
the digital multiplexer (DMX) forwards the fifth digital signal (S 5 ) to the digital input circuit (DSI) as the sixth digital signal (S 6 ),
the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates the seventh response signal (S 7 ),
the seventh response signal (S 7 ) is used as a test result or to form a result of a check performed by the measuring system in the first test mode,

wherein, in the test phase the measuring system also assumes a third test mode, in which:
the digital signal generating unit (DSO) generates the first digital signal (S 1 ),
the digital channel simulation unit converts the first digital signal (S 1 ) into a fifth digital test signal (S 5 t ),
the digital multiplexer (DMX) forwards the fifth digital test signal (S 5 t ) to the digital input circuit (DSI) as the sixth digital signal (S 6 ),
the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates the seventh response signal (S 7 ), and
the seventh response signal (S 7 ) is used as a test result or to form the result of a check performed by the measuring system in the third test mode.

2. The measuring system according to claim 1 , wherein in the test phase, the measuring system also assumes a second test mode, besides the first test mode and the third test mode, wherein in the second test mode:
the digital signal generating unit (DSO) generates the first digital signal (S 1 ),
the driver stage converts the first digital signal (DSI) of the digital signal generating unit (DSO) into the second analogue signal (S 2 ),
an analogue channel simulation unit (ACS) generates a third analogue test signal (S 3 t ) based on the second analogue signal (S 2 ),
the analogue multiplexer (AMX) forwards the third analogue test signal (S 3 t ) as the fourth analogue signal (S 4 ),
the analogue input circuit (AS) converts the fourth analogue signal (S 4 ) into the fifth digital signal (S 5 ),
the digital multiplexer (DMX) forwards the fifth digital signal (S 5 ) as the sixth digital signal (S 6 ),
the digital input circuit (DSI) receives the sixth digital signal (S 6 ) and generates the seventh response signal (S 7 ), and
the seventh response signal (S 7 ) is used as a test result or to form a result of a check performed by the measuring system in the second test mode.

3. The measuring system (SS) according to claim 1 , further comprising:
a transmitter (UEB), which is arranged between the measuring unit (TR) on a first side and the driver stage (DR) and the analogue multiplexer (AMX) on a second side,
wherein in the operating mode and in the first test mode
the second analogue signal (S 2 ) of the driver stage (DR) is ted to the measuring unit (TR) by the transmitter (UEB), and
the measuring unit (TR) feeds the receive signal (ES) to the transmitter (UEB), and the transmitter (UEB) forwards the receive signal (ES) as the third analogue signal (S 3 ) to the analogue multiplexer (AMX).

4. The measuring system (SS) according to claim 3 , wherein, in the operating mode, at least one comparison apparatus, in particular a comparator (C 2 , C 3 ), compares a parameter value of the third analogue signal (S 3 a , S 3 b ) with at least one reference value (Ref 2 , Ref 3 ) and generates at least one comparison result signal (v 2 , v 3 ) depending on a comparison result.

5. The measuring system according to claim 4 , wherein, in the operating mode, an error message is generated when indicated by the at least one comparison result signal.

6. The measuring system according to claim 3 , wherein, in the operating mode, at least one comparison apparatus, in particular a differential amplifier (D 1 ), compares two parameter values of the third analogue signal (S 3 a , S 3 b ) with one another, in particular by establishing a difference, and generates a difference signal (d 1 ), and by comparing the difference signal (d 1 ) with at least one reference value (Ref 1 ) generates a comparison result signal (v 1 ), in particular by means of a comparator (C 1 ) separate from the comparison apparatus.

7. The measuring system (SS) according to claim 3 , wherein, in the operating mode, at least one comparison apparatus, in particular a comparator (C 4 , C 5 , C 6 ), compares a parameter value of the second analogue signal (S 2 a , S 2 b , S 2 c ) with a respective reference value (Ref 4 , Ref 5 , Ref 6 ) and generates a respective comparison result signal (v 4 , v 5 , v 6 ) depending on a respective comparison result.

8. The measuring system (SS) according to claim 3 , wherein, in the operating mode, at least one comparison apparatus, in particular a differential amplifier (D 7 , D 6 , D 8 ), compares two parameter values of the second analogue signal (S 2 a , S 2 b , S 2 c ) with one another, in particular by establishing a respective difference, and generates a respective dif

Assignees

• Elmos Semiconductor Se

Inventors

• Schmidt André
• Schlautmann Guido
• Heppekausen Stefanie

Classifications

• G01S7/526

  Receivers · CPC title

• G01S15/931 Primary

  of land vehicles · CPC title

• G01S7/52004 Primary

  Means for monitoring or calibrating (short-range imaging G01S7/5205) · CPC title

• G01S7/4073

  involving an IF signal injection · CPC title

• G01S7/524

  Transmitters · CPC title