Mother substrate and display panel

Patent metadata

Field	Value
Publication number	US-11309309-B2
Application number	US-201716074352-A
Country	US
Kind code	B2
Filing date	Dec 18, 2017
Priority date	May 10, 2017
Publication date	Apr 19, 2022
Grant date	Apr 19, 2022

Abstract

A mother substrate and a display panel are disclosed. The mother substrate includes a plurality of display panels, a plurality of first test terminals and a plurality of first one-way conductive circuits. Each of the display panels has a display area, and includes a plurality of first signal lines extending from outside of the display area to the display area in parallel; the plurality of first signal lines of each of the display panels are respectively electrically connected to one of the plurality of first test terminals; the plurality of first one-way conductive circuits are respectively electrically connected to the plurality of first signal lines outside the display area and are configured to allow signals to be able to transmit only from the plurality of first test terminals to the plurality of first signal lines of each of the display panels.

First claim

What is claimed is:

1. A mother substrate, comprising:
a plurality of display panels, wherein each of the display panels has a display area, and comprises a plurality of first signal lines extending from outside of the display area to the display area in parallel;
a plurality of first test terminals, wherein the plurality of first signal lines of each of the display panels are respectively electrically connected to one of the plurality of first test terminals; and
a plurality of first one-way conductive circuits, wherein the plurality of first one-way conductive circuits are respectively electrically connected to the plurality of first signal lines outside of the display area, and are configured to allow signals to be able to transmit only from the plurality of first test terminals to the plurality of first signal lines of each of the display panels,
wherein each first one-way conductive circuit comprises a first conductive layer, a first insulation layer, an active layer, a second insulation layer, and a second conductive layer sequentially provided;
the first conductive layer comprises a first sub-region and a second sub-region which are insulated from each other; and
the second conductive layer comprises a first connection electrode and a second connection electrode which are insulated from each other, one end of the first connection electrode and one end of the second connection electrode are electrically connected to the first sub-region and the second sub-region respectively via through holes in the first insulation layer and the second insulation layer, and another end of the first connection electrode and another end of the second connection electrode are respectively electrically connected to the active layer.

2. The mother substrate according to claim 1 , further comprising a plurality of first test bus lines,
wherein the plurality of first test bus lines are electrically connected to the plurality of first test terminals,
each of the first one-way conductive circuits is electrically connected to one of the plurality of first test bus lines, such that the plurality of first signal lines of each of the display panels are respectively electrically connected to the one of the plurality of first test terminals.

3. The mother substrate according to claim 2 , wherein
each of the first one-way conductive circuits comprises a first terminal and a second terminal;
the first terminal is electrically connected to a corresponding one of the first signal lines;
the second terminal is electrically connected to a corresponding one of the first test bus lines; and a conducting direction of each of the first one-way conductive circuits is a direction from the second terminal to the first terminal, such that the signals are only allowed to be transmitted from the plurality of first test terminals to the plurality of first signal lines of each of the display panels.

4. The mother substrate according to claim 3 , wherein
each of the display panels further comprises a plurality of antistatic circuits and an electrostatic release line; and
the plurality of antistatic circuits are respectively provided between and electrically connected to the plurality of first signal lines and the electrostatic release line outside of the display area, and are respectively provided between and electrically connected to first terminals of the plurality of first one-way conductive circuits and the electrostatic release line.

5. The mother substrate according to claim 3 , wherein
each of the display panels further comprises a plurality of antistatic circuits, each of the antistatic circuits is provided between adjacent two first signal lines, and is provided between first terminals of two first one-way conductive circuits electrically connected to the adjacent two first signal lines.

6. The mother substrate according to claim 1 , further comprising a cutting area,
wherein the first test terminals are provided in the cutting area,
the plurality of first signal lines of each of the display panels are respectively electrically connected to the one of the plurality of first test terminals in the cutting area.

7. The mother substrate according to claim 6 , wherein the plurality of first one-way conductive circuits are provided in the cutting area.

8. The mother substrate according to claim 1 , wherein
at least two adjacent first signal lines are electrically connected to different first test terminals via corresponding first one-way conductive circuits.

9. The mother substrate according to claim 8 , wherein
the mother substrate comprises at least two first test terminals electrically connected to the first signal lines of each of the display panels,
one of the at least two first test terminals is electrically connected to the first signal lines in odd-numbered rows of each of the display panels, and another first test terminal of the at least two first test terminals is electrically connected to the first signal lines in even-numbered rows of each of the display panels.

10. The mother substrate according to claim 1 , further comprising: a plurality of second test terminals and a plurality of second one-way conductive circuits,
wherein each of the display panels further comprises a plurality of second signal lines extending from the outside of the display area to the display area in parallel, wherein the plurality of second signal lines intersect with the plurality of first signal lines;
the plurality of second signal lines of each of the display panels are respectively electrically connected to one of the plurality of second test terminals; and
the plurality of second one-way conductive circuits are respectively electrically connected to the plurality of second signal lines outside of the display area, and are configured to allow signals to be able to transmit only from the plurality of second test terminals to the plurality of second signal lines of each of the display panels.

11. The mother substrate according to claim 10 , further comprising a plurality of second test bus lines,
wherein the plurality of second test bus lines are electrically connected to the plurality of second test terminals, and each of the second one-way conductive circuits is electrically connected to one of the plurality of second test bus lines, such that the plurality of second signal lines of each of the display panels are respectively electrically connected to the one of the plurality of second test terminals.

12. The mother substrate according to claim 10 , wherein at least two adjacent second signal lines are electrically connected to different second test terminals via corresponding second one-way conductive circuits.

13. The mother substrate according to claim 1 , wherein
the first one-way conductive circuit further comprises a third conductive layer;
the third conductive layer is provided between the first insulation layer and the second insulation layer;
the third conductive layer comprises a first intermediate electrode and a second intermediate electrode;
one end of the first intermediate electrode and one end of the second intermediate electrode are respectively electrically connected to the first connection electrode and the second connection electrode via through holes in the second insulation layer; and
another end of the first intermediate electrode and another end of the second intermediate electrode are respectively electrically connected to the active layer.

14. The mother substrate according to claim 13 , wherein
each of the display panels comprises a thin film transistor;
the first conductive layer and a gate electrode of the thin film t

Assignees

• Boe Technology Group Co Ltd
• Hefei Xinsheng Optoelectronics Technology Co Ltd

Inventors

• Zhang Han
• Wang Haifeng
• Ren Xingfeng
• Pan Xin
• Feng Yanrong

Classifications

• H10D89/921

  characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses · CPC title

• H10D89/813

  specially adapted to provide an electrical current path other than the field-effect induced current path · CPC title

• H10D89/611

  using diodes as protective elements · CPC title

• H10D86/443

  adapted for preventing breakage, peeling or short circuiting · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title