Printed circuit board and method for manufacturing printed circuit board

US11304309B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11304309-B2
Application numberUS-201917048806-A
CountryUS
Kind codeB2
Filing dateMar 7, 2019
Priority dateMay 11, 2018
Publication dateApr 12, 2022
Grant dateApr 12, 2022

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board according to an embodiment of the present disclosure includes a base film having an insulating property, and a conductive pattern that is stacked on at least one surface of the base film and that includes a plurality of wiring parts arranged in parallel. The plurality of wiring parts have an average width of 5 μm or more and 15 μm or less. The plurality of wiring parts have an electroless plating layer and an electroplating layer stacked on the electroless plating layer. A void density at an interface between the electroless plating layer and the electroplating layer in a section of the plurality of wiring parts in a thickness direction is 0.01 μm2/μm or less.

First claim

Opening claim text (preview).

The invention claimed is: 1. A printed circuit board comprising: a base film having an insulating property; and a conductive pattern that is stacked on at least one surface of the base film and that includes a plurality of wiring parts arranged in parallel, wherein the plurality of wiring parts have an average width of 5 μm or more and 15 μm or less, the plurality of wiring parts have an electroless plating layer and an electroplating layer stacked on the electroless plating layer, and a void density at an interface between the electroless plating layer and the electroplating layer in a section of the plurality of wiring parts in a thickness direction is 0.01 μm 2 /μm or less. 2. The printed circuit board according to claim 1 , wherein a maximum area of a void formed at the interface is 0.01 μm 2 or less. 3. The printed circuit board according to claim 1 , wherein an average spacing of the plurality of wiring parts is 5 μm or more and 15 μm or less. 4. The printed circuit board according to claim 1 , wherein the electroless plating layer and the electroplating layer contain copper as a main component. 5. A method for manufacturing a printed circuit board, comprising a step of forming, by a semi-additive method, a conductive pattern including a plurality of wiring parts arranged in parallel on at least one surface of a base film having an insulating property, wherein the step of forming includes an electroless plating step of subjecting the one surface of the base film to electroless plating, a resist pattern-forming step of forming a resist pattern having an inverted shape of the plurality of wiring parts on a surface of an electroless plating layer formed in the electroless plating step, a plasma treatment step of subjecting surfaces of the resist pattern and the electroless plating layer after the resist pattern-forming step to plasma treatment, and an electroplating step of subjecting the surface of the electroless plating layer after the plasma treatment step to electroplating, the plurality of wiring parts have an average width of 5 μm or more and 15 μm or less, and an amount of ashing of the resist pattern through the plasma treatment step is 60 nm or more and 300 nm or less. 6. The method for manufacturing a printed circuit board according to claim 5 , wherein an initial current density in the electroplating step is 0.003 A/m 2 or more and 0.015 A/m 2 or less. 7. The printed circuit board according to claim 1 , wherein the void density is 0.001 μm 2 /μm or more and 0.01 μm 2 /μm or less. 8. The printed circuit board according to claim 1 , wherein a void is formed at the interface. 9. The printed circuit board according to claim 8 , wherein a maximum area of the void formed at the interface is 0.01 μm 2 or less. 10. The printed circuit board according to claim 8 , wherein a maximum area of the void formed at the interface is 0.001 μm 2 or more and 0.01 μm 2 or less.

Assignees

Inventors

Classifications

  • Pretreatment of metallic surfaces to be electroplated · CPC title

  • of copper · CPC title

  • by electroless plating (adhesives therefor H05K3/387) · CPC title

  • Use of materials for the {conductive, e.g. } metallic pattern · CPC title

  • Process control or regulation (controlling or regulating in general G05) · CPC title

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Frequently asked questions

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What does patent US11304309B2 cover?
A printed circuit board according to an embodiment of the present disclosure includes a base film having an insulating property, and a conductive pattern that is stacked on at least one surface of the base film and that includes a plurality of wiring parts arranged in parallel. The plurality of wiring parts have an average width of 5 μm or more and 15 μm or less. The plurality of wiring parts h…
Who is the assignee on this patent?
Sumitomo Electric Industries
What technology area does this patent fall under?
Primary CPC classification H05K3/38. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 12 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).