Digital to analog converters

Patent metadata

Field	Value
Publication number	US-11303294-B2
Application number	US-202017086949-A
Country	US
Kind code	B2
Filing date	Nov 2, 2020
Priority date	Dec 17, 2019
Publication date	Apr 12, 2022
Grant date	Apr 12, 2022

Abstract

The present disclosure provides digital to analog conversion circuitry comprising: a set of input nodes for receiving a digital input code; an output node for outputting an analog output signal representative of the input code; and a plurality of selectable conversion elements, wherein a parameter of each of the plurality of selectable conversion elements is configured such that a transfer function between the input code and the output analog signal is non-monotonic.

First claim

The invention claimed is:

1. Digital to analog conversion circuitry comprising:
a set of input nodes for receiving a digital input code;
an output node for outputting an analog output signal representative of the input code; and
a plurality of selectable conversion elements;
wherein the plurality of selectable conversion elements is arranged in a plurality of arrays of selectable conversion elements, and wherein a parameter of each of the plurality of selectable conversion elements of each of the plurality of arrays is configured such that a transfer function between an input code input to the array and an analog signal output by the array is non-monotonic.

2. Digital to analog conversion circuitry according to claim 1 , wherein the circuitry comprises first, second and third arrays of selectable conversion elements.

3. Digital to analog conversion circuitry according to claim 2 , wherein the conversion elements of the third array have the same parameter values as corresponding conversion elements of the first array.

4. Digital to analog conversion circuitry according to claim 2 , wherein the first, second and third arrays of selectable conversion elements are arranged in series between a reference voltage and ground.

5. Digital to analog conversion circuitry according to claim 4 , wherein the circuitry is configured to produce a differential output signal between a first output node between the first array and second array and a second output node between the second array and the third array.

6. Digital to analog conversion circuitry according to claim 5 , further comprising a first output amplifier having an input coupled to the first output node and a second output amplifier coupled to the second output node.

7. Digital to analog conversion circuitry according to claim 2 , wherein the first, second and third arrays comprise selectable resistances or selectable capacitances.

8. Digital to analog conversion circuitry according to claim 1 wherein the plurality of selectable conversion elements comprise selectable resistances and the parameter comprises a resistance value.

9. Digital to analog conversion circuitry according to claim 8 , wherein the resistances are coupled in parallel with each other.

10. Digital to analog conversion circuitry according to claim 1 wherein the plurality of selectable conversion elements comprise selectable capacitances and wherein the parameter comprises a capacitance value.

11. Digital to analog conversion circuitry according to claim 1 , wherein the resistances are arranged in a ladder configuration.

12. Digital to analog conversion circuitry according to claim 1 wherein the plurality of selectable conversion elements comprise selectable current sources and wherein the parameter comprises an output current value.

13. A digital to analog converter (DAC) comprising:
a plurality of arrays of selectable conversion elements; and
amplifier circuitry,
wherein the plurality of selectable conversion elements of each of the plurality of arrays are weighted so as to produce a plurality of overlapping DAC output signal ranges.

14. A DAC according to claim 13 , wherein the amplifier circuitry comprises operational amplifier or buffer circuitry.

15. A DAC according to claim 13 wherein the selectable conversion elements are resistors.

16. A DAC according to claim 13 wherein the selectable conversion elements are capacitors.

17. A DAC according to claim 13 wherein the selectable conversion elements are current sources.

18. Digital to analog converter (DAC) circuitry for receiving digital input codes and outputting analog signals representative of the input codes, comprising:
a plurality of selectable conversion elements for providing either a monotonic or non-monotonic transfer function based on one or more of the plurality of selectable conversion elements, wherein the plurality of selectable conversion elements is arranged in a plurality of arrays of selectable conversion elements.

Assignees

• Cirrus Logic Int Semiconductor Ltd
• Cirrus Logic Inc

Inventors

• Mcveigh Gavin

Classifications

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H03M1/80

  using weighted impedances (H03M1/76 takes precedence) · CPC title

• H03M1/785 Primary

  using resistors, i.e. R-2R ladders · CPC title

• G01L1/14

  by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators · CPC title

• H03M1/16

  with scale factor modification, i.e. by changing the amplification between the steps {(H03M1/141 takes precedence)} · CPC title