Automatic feature extraction from aerial images for test pattern sampling and pattern coverage inspection for lithography

Patent metadata

Field	Value
Publication number	US-11301748-B2
Application number	US-201816188803-A
Country	US
Kind code	B2
Filing date	Nov 13, 2018
Priority date	Nov 13, 2018
Publication date	Apr 12, 2022
Grant date	Apr 12, 2022

Abstract

According to one or more embodiments of the present invention a computer-implemented method for fabricating a chip includes generating, using an aerial image generation system, a set of aerial images for a chip layout, the set of aerial images including an aerial image corresponding to each region from the chip layout. The method further includes automatically determining, using an artificial neural network, a feature vector for each aerial image from the set of aerial images. The method further includes clustering the aerial images using their corresponding feature vectors. The method further includes selecting, as test samples, a predetermined number of aerial images from each cluster. The method further includes performing a pattern coverage inspection of the chip layout using the aerial images that are selected as test samples.

First claim

What is claimed is:

1. A computer-implemented method for fabricating a chip, the computer-implemented method comprising:
generating, using an aerial image generation system comprising a physical photomask template, a set of aerial images of a pattern in the physical photomask template representative of that formed on the chip, the pattern on the chip being formed according to a chip layout, the set of aerial images comprising an aerial image corresponding to each region from the chip layout;
automatically determining, using an artificial neural network, a feature vector related to a mask image projected onto photoresist material of the chip for each aerial image from the set of aerial images of the chip, the artificial neural network being configured to process the set of aerial images having an exposure condition;
clustering the aerial images of the chip using their corresponding feature vectors related to mask images projected onto the photoresist material of the chip, the clustering resulting in a plurality of clusters of the aerial images;
selecting, as test samples, a subset of the aerial images of the chip from the plurality of clusters, the selecting reduces a number of the aerial images to be used for testing the chip layout formed on the chip; and
performing a pattern coverage inspection of the chip layout formed on the chip using the aerial images that are selected as the test samples, the artificial neural network being configured for use with other aerial images for another chip layout in which the other aerial images have a same exposure condition as the exposure condition applied to the physical photomask template regardless of a size of the another chip layout.

2. The computer-implemented method of claim 1 , wherein the artificial neural network comprises a deep neural network that is trained using supervised learning.

3. The computer-implemented method of claim 2 , wherein the feature vector for each aerial image is automatically determined by extracting outputs of a predetermined hidden layer from the deep neural network.

4. The computer-implemented method of claim 3 , wherein the predetermined hidden layer comprises a layer that immediately precedes a classification layer in the deep neural network.

5. The computer-implemented method of claim 1 , wherein the artificial neural network comprises an autoencoder that is trained using unsupervised learning.

6. The computer-implemented method of claim 5 , wherein the feature vector for each aerial image is automatically determined by extracting codings from the autoencoder based on each aerial image being input to the autoencoder.

7. The computer-implemented method of claim 1 , wherein the artificial neural network is trained by adjusting one or more hyperparameters of the artificial neural network, the subset of the aerial images being selected from clusters of the plurality of clusters representing a possibility of a defect in the chip.

8. The computer-implemented method of claim 1 , wherein the plurality of clusters of the aerial images comprises a first cluster having at least one hotspot and a second cluster excluding any hotspots, such that the first cluster displays the corresponding feature vectors of the aerial images having the at least one hotspot and the second cluster displays the corresponding feature vectors of the aerial images having no hotspot.

9. The computer-implemented method of claim 1 , wherein the feature vector related to the mask image projected onto the photoresist material of the chip comprises a light intensity, a contour curvature, and a slope of aerial image intensity profiles, the light intensity being associated with a projection of the mask image onto the photoresist material, the light intensity comprising a maximum intensity and a minimum intensity.

10. A system for fabricating a chip, the system comprising:
a memory; and
a processor coupled with the memory, the processor configured to perform a method comprising:
generating, using an aerial image generation system comprising a physical photomask template, a set of aerial images of a pattern in the physical photomask template representative of that formed on the chip, the pattern on the chip being formed according to a chip layout, the set of aerial images comprising an aerial image corresponding to each region from the chip layout;
automatically determining, using an artificial neural network, a feature vector related to a mask image projected onto photoresist material of the chip for each aerial image from the set of aerial images of the chip, the artificial neural network being configured to process the set of aerial images having an exposure condition;
clustering the aerial images of the chip using their corresponding feature vectors related to mask images projected onto the photoresist material of the chip, the clustering resulting in a plurality of clusters of the aerial images;
selecting, as test samples, a subset of the aerial images of the chip from the plurality of clusters, the selecting reduces a number of the aerial images to be used for testing the chip layout formed on the chip; and
performing a pattern coverage inspection of the chip layout formed on the chip using the aerial images that are selected as the test samples, the artificial neural network being configured for use with other aerial images for another chip layout in which the other aerial images have a same exposure condition as the exposure condition applied to the physical photomask template regardless of a size of the another chip layout.

11. The system of claim 10 , wherein the artificial neural network comprises a deep neural network that is trained using supervised learning.

12. The system of claim 11 , wherein the feature vector for each aerial image is automatically determined by extracting outputs of a predetermined hidden layer from the deep neural network.

13. The system of claim 12 , wherein the predetermined hidden layer comprises a layer that immediately precedes a classification layer in the deep neural network.

14. The system of claim 10 , wherein the artificial neural network comprises an autoencoder that is trained using unsupervised learning.

15. The system of claim 14 , wherein the feature vector for each aerial image is automatically determined by extracting codings from the autoencoder based on each aerial image being input to the autoencoder.

16. The system of claim 10 , wherein the artificial neural network is trained by adjusting one or more hyperparameters of the artificial neural network, the subset of the aerial images being selected from clusters of the plurality of clusters representing a possibility of a defect in the chip.

17. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processing circuit to perform a method for adjusting design of a chip, the method comprising:
generating, using an aerial image generation system comprising a physical photomask template, a set of aerial images of a pattern in the physical photomask template representative of that formed on the chip, the pattern on the chip being formed according to a chip layout, the set of aerial images comprising an aerial image corresponding to each region from the chip layout;
automatically determining, using an artificial neural network, a feature vector related to a mask image projected onto photoresist material of the chip for each aerial image from the set of aerial images of the chip, the artificial neural network being configured to process the set

Assignees

• IBM

Inventors

• Sha Jing
• Burkhardt Martin
• Burns Sean

Classifications

• G06T7/0004 Primary

  Industrial image inspection · CPC title

• G06V10/774

  Generating sets of training patterns; Bootstrap methods, e.g. bagging or boosting · CPC title

• G06V10/762

  using clustering, e.g. of similar faces in social networks · CPC title

• G06V10/82

  using neural networks · CPC title

• G06V10/454

  Integrating the filters into a hierarchical structure, e.g. convolutional neural networks [CNN] · CPC title