Image compensation circuit and related compensation method

US11295674B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11295674-B2
Application numberUS-202117199468-A
CountryUS
Kind codeB2
Filing dateMar 12, 2021
Priority dateMar 27, 2020
Publication dateApr 5, 2022
Grant dateApr 5, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention provides an image compensation circuit generating output image data to drive a display panel having pixels. The image compensation circuit includes first/second control circuits and first/second compensation circuits. The first control circuit may receive input image data for the pixels and generate a plurality of first compensation values corresponding to compensation for voltage drop on the display panel according to the input image data. The first compensation circuit may compensate the input image data for the pixels with the first compensation values. The second control circuit may receive the first compensation values from the first control circuit and generate a plurality of second compensation values corresponding to compensation for channel length modulation (CLM) effect of the pixels according to the first compensation values. The second compensation circuit may compensate the input image data for the pixels with the second compensation values, to generate the output image data.

First claim

Opening claim text (preview).

What is claimed is: 1. An image compensation circuit generating output image data to drive a display panel, the display panel comprising a plurality of pixels, the image compensation circuit comprising: a first control circuit to receive input image data for the pixels and generate a plurality of first compensation values for the pixels according to the input image data; a first compensation circuit, coupled to the first control circuit, to compensate the input image data for the pixels with the first compensation values; a second control circuit, coupled to the first control circuit, to receive the first compensation values from the first control circuit and generate a plurality of second compensation values for the pixels according to the first compensation values; and a second compensation circuit, coupled to the second control circuit, to compensate the input image data for the pixels with the second compensation values, to generate the output image data; wherein the first compensation values correspond to a compensation for a voltage drop on the display panel, and the second compensation values correspond to a compensation for a channel length modulation (CLM) effect of the pixels; wherein at least one compensation value among the first compensation values and the second compensation values for a first pixel among the plurality of pixels is determined according to the input image data for the first pixel and the input image data for a second pixel among the plurality of pixels. 2. The image compensation circuit of claim 1 , wherein the second compensation values are determined according to device characteristics of the pixels. 3. The image compensation circuit of claim 2 , wherein each of the pixels comprises a plurality of transistors and a light emitting device, and the device characteristics of the pixels comprise a CLM parameter of the transistors. 4. The image compensation circuit of claim 3 , wherein the device characteristics of the pixels further comprise at least one of a threshold voltage of the transistors and an operation voltage of the light emitting device. 5. The image compensation circuit of claim 1 , wherein the second compensation values for the pixels are different when the input image data for the pixels are the same and the pixels have different colors. 6. The image compensation circuit of claim 1 , wherein the second compensation values for the pixels are different when the input image data for the pixels are different. 7. The image compensation circuit of claim 1 , wherein the second compensation values for the pixels at different locations of the display panel are different when the input image data for the pixels are the same. 8. The image compensation circuit of claim 1 , wherein the second compensation values for the pixels are different when the first compensation values for the pixels are different. 9. A compensation method for an image compensation circuit generating output image data to drive a display panel having a plurality of pixels, the compensation method comprising: receiving input image data for the pixels; generating a plurality of first compensation values for the pixels according to the input image data; generating a plurality of second compensation values for the pixels according to the first compensation values; compensating the input image data for the pixels with the first compensation values and the second compensation values, to generate the output image data; and determining at least one compensation value among the first compensation values and the second compensation values for a first pixel among the plurality of pixels according to the input image data for the first pixel and the input image data for a second pixel among the plurality of pixels; wherein the first compensation values correspond to a compensation for a voltage drop on the display panel, and the second compensation values correspond to a compensation for a channel length modulation (CLM) effect of the pixels. 10. The compensation method of claim 9 , further comprising: determining the second compensation values according to device characteristics of the pixels. 11. The compensation method of claim 10 , wherein each of the pixels comprises a plurality of transistors and a light emitting device, and the device characteristics of the pixels comprise a CLM parameter of the transistors. 12. The compensation method of claim 11 , wherein the device characteristics of the pixels further comprise at least one of a threshold voltage of the transistors and an operation voltage of the light emitting device. 13. The compensation method of claim 9 , wherein the second compensation values for the pixels are different when the input image data for the pixels are the same and the pixels have different colors. 14. The compensation method of claim 9 , wherein the second compensation values for the pixels are different when the input image data for the pixels are different. 15. The compensation method of claim 9 , wherein the second compensation values for the pixels at different locations of the display panel are different when the input image data for the pixels are the same. 16. The compensation method of claim 9 , wherein the second compensation values for the pixels are different when the first compensation values for the pixels are different.

Assignees

Inventors

Classifications

  • Compensation of deficiencies in the appearance of colours · CPC title

  • for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction · CPC title

  • G09G3/3208Primary

    organic, e.g. using organic light-emitting diodes [OLED] · CPC title

  • Calculation or use of calculated indices related to luminance levels in display data · CPC title

  • Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

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What does patent US11295674B2 cover?
The present invention provides an image compensation circuit generating output image data to drive a display panel having pixels. The image compensation circuit includes first/second control circuits and first/second compensation circuits. The first control circuit may receive input image data for the pixels and generate a plurality of first compensation values corresponding to compensation for…
Who is the assignee on this patent?
Novatek Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification G09G3/3208. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 05 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).