Method for designing power network and power network

Patent metadata

Field	Value
Publication number	US-11295054-B1
Application number	US-202017085059-A
Country	US
Kind code	B1
Filing date	Oct 30, 2020
Priority date	Sep 30, 2020
Publication date	Apr 5, 2022
Grant date	Apr 5, 2022

Abstract

A method for designing a power network is provided and includes: initializing via widths and power-trace widths; determining whether utilization rates of first, second and third routing tracks are respectively equal to first, second and third values; when said utilization rate of said first routing tracks is not equal to said first value, adjusting said distance between first and second power traces until said utilization rate thereof is equal to said first value; when said utilization rate of said second routing tracks is not equal to said second value, adjusting said distance between third and fourth power traces until said utilization rate thereof is equal to said second value; and when said utilization rate of said third routing tracks is not equal to said third value, adjusting said distance between fifth and sixth power traces until said utilization rate thereof is equal to said third value.

First claim

What is claimed is:

1. A power network comprising:
a first metal layer, comprising a plurality of first routing tracks, a plurality of first power traces, and a plurality of first vias, wherein said plurality of first power traces are electrically connected to said plurality of first vias;
a second metal layer, comprising a plurality of second routing tracks and a plurality of second vias, wherein said plurality of second vias are electrically connected to said plurality of first vias; and
a third metal layer, comprising a plurality of third routing tracks, a plurality of third power traces, and a plurality of third vias, wherein said plurality of third power traces are electrically connected to said plurality of second vias and said plurality of third vias,
wherein a utilization rate of said plurality of first routing tracks is greater than a utilization rate of said plurality of second routing tracks, and said utilization rate of said plurality of second routing tracks is greater than a utilization rate of said plurality of third routing tracks.

2. The power network as claimed in claim 1 , wherein said plurality of first power traces are electrically connected to each other, and a width of one of said plurality of first power traces is different from a width of another of said plurality of first power traces.

3. The power network as claimed in claim 1 , wherein a width of one of said plurality of first power traces is greater than a width of one of said plurality of first vias.

4. The power network as claimed in claim 1 wherein said plurality of second vias of said second metal layer are insulated from each other.

5. The power network as claimed in claim 1 , wherein said plurality of first routing tracks are covered by said plurality of first power traces.

6. The power network as claimed in claim 1 , wherein said second metal layer further comprises a plurality of second power traces, and said plurality of second power traces are electrically connected to said plurality of second vias.

7. The power network as claimed in claim 6 , wherein said plurality of first power traces, said plurality of second power traces, and said plurality of third power traces are electrically connected to each other through said plurality of first vias, said plurality of second vias, and said plurality of third vias.

8. The power network as claimed in claim 6 , wherein half of said plurality of second routing tracks are covered by said plurality of second power traces, and a quarter of said plurality of third routing tracks are covered by said plurality of third power traces.

Assignees

• Shanghai Zhaoxin Semiconductor Co Ltd

Inventors

• Wang Long
• Lin Jerming
• Li Yi
• Li Xiaojing
• Al Di

Classifications

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10W20/427 Primary

  Power or ground buses · CPC title

• G06F2119/06

  Power analysis or power optimisation · CPC title

• G06F30/394 Primary

  Routing (G06F30/396 takes precedence) · CPC title

• G06F16/9017

  using directory or table look-up (use of a directory or look-up table in file systems G06F16/13) · CPC title