Array substrate and display panel
US-2017131608-A1 · May 11, 2017 · US
US11294250B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11294250-B2 |
| Application number | US-201816217627-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 12, 2018 |
| Priority date | Dec 22, 2017 |
| Publication date | Apr 5, 2022 |
| Grant date | Apr 5, 2022 |
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Provided is a liquid-crystal display device. The liquid-crystal display device includes gate lines and data lines disposed on a substrate and overlapping with one another to define sub-pixels, two thin-film transistors disposed together in a circuit area of one of two sub-pixels next to each other in a horizontal direction among the sub-pixels; and common electrodes and pixel electrodes disposed alternately in each of the sub-pixels. The two thin-film transistors are connected to the two sub-pixels, respectively.
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The invention claimed is: 1. A display device, comprising: a substrate; a plurality of sub-pixels disposed on the substrate in a horizontal direction and a vertical direction; gate lines and data lines disposed on the substrate and overlapping with one another to separate the sub-pixels from each other; two thin-film transistors disposed together in a circuit area of one of two sub-pixels aligned with each other in the horizontal direction among the sub-pixels; and common electrodes and pixel electrodes disposed alternately in each of the sub-pixels, wherein the two thin-film transistors are electrically coupled to the two sub- pixels, respectively, wherein the plurality of sub-pixels include a row of sub-pixels which is a group of sub-pixels arranged in a row direction among the plurality of the sub-pixels and a column of sub-pixels which is a group of sub-pixels arranged in a column direction among the plurality of the sub-pixels, and wherein two adjacent sub-pixels of the row of sub-pixels aligned with each other in a horizontal direction have different lengths from each other in the column direction and two adjacent sub-pixels of the column of sub-pixels aligned with each other in a vertical direction have different lengths from each other in the column direction. 2. The device of claim 1 , further comprising: color filters disposed in the sub-pixels; and a light-blocking layer disposed at a boundary between two sub-pixels aligned with each other in a vertical direction among the sub-pixels, the light-blocking layer including at least one of the color filters. 3. The device of claim 2 , wherein the light-blocking layer includes a blue color filter on a red color filter. 4. The device of claim 1 , further comprising: a common line disposed between a lower side of the sub-pixels and the gate lines, the common line extending in a direction parallel to the gate lines. 5. The device of claim 4 , further comprising: a first light-blocking line disposed on at least one side of each of the data lines, the first light-blocking line being electrically coupled to the common line; and a second light-blocking line disposed above each of the data lines. 6. The device of claim 1 , further comprising: a first pixel electrode connection portion disposed in the circuit area of the one of the two sub-pixels, the first pixel electrode connection portion being electrically coupled to a pixel electrode of the one of the two sub-pixels, the first pixel electrode connection portion extending through a first contact hole; and a second pixel electrode connection portion electrically coupled to a pixel electrode of the other of the two sub-pixels, the second pixel electrode connection portion extending through a second contact hole. 7. The device of claim 6 , wherein the second pixel electrode connection portion is electrically coupled to the pixel electrode of the other of the two sub-pixels via one of the data lines disposed between the two sub-pixels. 8. The device of claim 1 , wherein the sub-pixels includes red sub- pixels, green sub-pixels, and blue sub-pixels, wherein the red sub-pixels, the green sub-pixels, and the blue sub-pixels are arranged repeatedly and sequentially in each of a plurality of rows, and wherein sub-pixels of the same color among the red sub-pixels, the green sub-pixels, and the blue sub-pixels are arranged repeatedly in each of a plurality of columns. 9. The device of claim 1 , wherein the sub-pixels includes red sub- pixels, green sub-pixels, blue sub-pixels, and white sub-pixels, wherein the red sub-pixels, the green sub-pixels, the blue sub-pixels, and the white sub-pixels are arranged repeatedly and sequentially in each of a plurality of rows, and wherein sub-pixels of two different colors are arranged repeatedly in each of a plurality of columns. 10. The display of claim 9 , wherein the sub-pixels of the two different colors are the red sub-pixel and the blue sub-pixel, or the green sub-pixel and the white sub-pixel. 11. The display device of claim 1 , wherein the display is a liquid crystal display. 12. A display device, comprising: a substrate; a plurality of sub-pixels disposed on the substrate in a horizontal direction and a vertical direction; gate lines and data lines disposed on the substrate and overlapping with one another to separate the sub-pixels from each other; two thin-film transistors disposed together in a circuit area of one of two sub-pixels aligned with each other in the horizontal direction among the sub-pixels; and common electrodes and pixel electrodes disposed alternately in each of the sub-pixels, wherein the two thin-film transistors are disposed together in the circuit area of the one of the two sub-pixels and no thin-film transistor is disposed in a circuit area of the other of the two sub-pixels, wherein the plurality of sub-pixels include a row of sub-pixels which is a group of sub-pixels arranged in a row direction among the plurality of the sub-pixels and a column of sub-pixels which is a group of sub-pixels arranged in a column direction among the plurality of the sub-pixels, and wherein two adjacent sub-pixels aligned with each other in a horizontal direction have different lengths from each other in the column direction and two adjacent sub-pixels aligned with each other in a vertical direction have different lengths from each other in the column direction. 13. The device of claim 12 , further comprising: color filters disposed in the sub-pixels; and a light-blocking layer disposed at a boundary between two sub-pixels aligned with each other in a vertical direction among the sub-pixels, the light-blocking layer including at least one of the color filters. 14. The device of claim 13 , further comprising: a common line disposed between a lower side of the sub-pixels and the gate lines, the common line extending in a direction parallel to the gate lines. 15. The device of claim 12 , wherein the two thin-film transistors are electrically coupled to the two sub-pixels, respectively. 16. The device of claim 12 , further comprising: a first pixel electrode connection portion disposed in the circuit area of the one of the two sub-pixels, the first pixel electrode connection portion being electrically coupled to a pixel electrode of the one of the two sub-pixels, the first pixel electrode connection portion extending through a first contact hole; and a second pixel electrode connection portion electrically coupled to a pixel electrode of the other of the two sub-pixels, the second pixel electrode connection portion extending through a second contact hole. 17. The device of claim 16 , wherein the second pixel electrode connection portion is electrically coupled to the pixel electrode of the other of the two sub-pixels via one of the data lines disposed between the two sub-pixels. 18. The device of claim 12 wherein the two sub-pixels are asymmetrical with each other. 19. The display device of claim 11 , wherein the display is a liquid crystal display.
Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)} · CPC title
wherein the TFTs are in active matrices · CPC title
integrated with passive devices, e.g. auxiliary capacitors · CPC title
Colour filters · CPC title
RGB geometrical arrangements · CPC title
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