Circuit board

Patent metadata

Field	Value
Publication number	US-11291123-B2
Application number	US-201716069893-A
Country	US
Kind code	B2
Filing date	Jan 9, 2017
Priority date	Jan 13, 2016
Publication date	Mar 29, 2022
Grant date	Mar 29, 2022

Abstract

The present invention relates to a circuit board including: a base board having a circuit region and a terminal region; a circuit pattern formed on an upper portion of the base board; and a low-melting-metal layer formed on an upper portion of the circuit pattern. A circuit board capable of reducing manufacturing time and manufacturing costs may be manufactured by omitting a photoresist process.

First claim

The invention claimed is:

1. A circuit board comprising:
a base board having a circuit and a terminal, the circuit corresponding to a circuit of the circuit board, the terminal configured to electrically connect the circuit board to other devices, the circuit and terminal being separate non-overlapping areas;
a circuit pattern on an upper surface of the base board including the circuit and the terminal; and
a low-melting-metal layer directly on an upper surface of the circuit pattern, wherein the low-melting-metal layer is made of a metal melted in a temperature range of 100° C. and 250° C., the low-melting-metal layer including
a first low-melting-metal layer above the circuit;
a second low-melting-metal layer above the terminal, the terminal being only a portion configured to electrically connect the circuit pattern and an external device and having a globular shape; and
a third low-melting-metal layer above the circuit, and between first low-melting-metal layer and second low-melting-metal layer,

wherein the third low-melting-metal layer has a continuously inclined surface with a lower end at the second low-melting-metal layer, immediately adjacent the terminal, and a higher end at the first low-melting-metal layer, the higher end being co-planar with a connecting plane of the first low-melting-metal layer, the connecting plane of the first low-melting-metal layer being lower than a highest plane of the second low-melting-metal layer, the first low-melting-metal layer having a greater overall length on the circuit pattern than an overall length of the second low-melting-metal layer and an overall length of the third low-melting-metal layer on the circuit pattern.

2. The circuit board of claim 1 , wherein
the second low-melting-metal layer is a soldering portion based on heat-treatment, and
the third low-melting-metal layer, based on heat-treatment, partially moves into the second low-melting-metal layer to form the soldering portion.

3. The circuit board of claim 1 , wherein
a circuit region corresponding to the circuit of the circuit pattern excluding the terminal, and
a terminal region being only a portion of the circuit pattern configured to electrically connect the circuit board to other devices.

4. The circuit board of claim 1 , wherein the terminal has not been connected to the external device.

5. The circuit board of claim 1 , wherein the first low-melting-metal layer has a planar top surface.

6. A method of manufacturing a circuit board, the method comprising:
providing a base board having a circuit and a terminal, the circuit and terminal being separate non-overlapping areas;
forming a circuit pattern on an upper surface of the base board;
forming a low-melting-metal layer directly on an upper surface of the circuit pattern which includes
a first low-melting-metal layer above the circuit,
a second low-melting-metal layer above the terminal, the terminal being only a portion configured to electrically connect the circuit pattern and an external device and having a globular shape, and
a third low-melting-metal layer above the circuit, and between first low-melting-metal layer and the second low-melting-metal layer; and

forming a soldering portion by heat-treating the second low-melting-metal layer and third low-melting-metal layer, a melted portion of the third low-melting-metal layer flows into the second low-melting-metal layer, and the heat-treated third low-melting-metal layer has a continuously inclined surface with a lower end at the second low-melting-metal layer and a higher end at the first low-melting-metal layer, the higher end being co-planar with a connecting plane of the first low-melting-metal layer, the connecting plane of the first low-melting-metal layer being lower than a highest plane of the second low-melting-metal layer, the first low-melting-metal layer having a greater overall length on the circuit pattern than an overall length of the second low-melting-metal layer and an overall length of the third low-melting-metal layer on the circuit pattern,
wherein the circuit corresponds to a circuit of the circuit board, and the terminal is configured to electrically connect the circuit board to other devices, and
wherein the low-melting-metal layer is made of a metal melted in a temperature range of 100° C. and 250° C.

Assignees

• Samwon Act Co Ltd
• Emot Co Ltd
• Korea Inst Mach & Materials
• Korea Institute Materials Science

Inventors

• Lee Kyung Yul
• Lee Kyung Wook
• Jeong Jun Sang
• Lee Yang Seok
• Kim Man
• Lee Joo Yul
• Lee Sang Yeoul

Classifications

• H05K1/115 Primary

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H05K2203/0338

  Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component · CPC title

• H05K2201/0305

  Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns · CPC title

• H05K3/4007

  Surface contacts, e.g. bumps (H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3465) · CPC title

• H05K2203/043

  Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste · CPC title