Solid-state imaging device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-11290665-B2
Application number	US-201816756188-A
Country	US
Kind code	B2
Filing date	Sep 21, 2018
Priority date	Oct 24, 2017
Publication date	Mar 29, 2022
Grant date	Mar 29, 2022

Abstract

There is provided a solid-state imaging device and an electronic apparatus that performs focus detection and image generation on objects of various shapes. A solid-state imaging device includes a pixel array in which multiple pixels are arrayed. The multiple pixels each receive light in a predetermined wavelength band. The pixel array includes at least one or more first pixels and at least one or more second pixels. The at least one or more first pixels each include a pair of sub-pixels provided beneath one microlens. The pair of sub-pixels is aligned in a first direction. The at least one or more second pixels each include a pair of sub-pixels provided beneath one microlens. The pair of sub-pixels is aligned in a second direction. The second direction is perpendicular to the first direction.

First claim

The invention claimed is:

1. A solid-state imaging device, comprising:
a pixel array, wherein
a first plurality of pixels is arrayed in the pixel array,
each pixel of the first plurality of pixels is configured to receive light in a specific wavelength band,
at least one first pixel of the first plurality of pixels includes a first pair of sub-pixels beneath a first microlens,
the first pair of sub-pixels is aligned in a first direction,
at least one second pixel of the first plurality of pixels includes a second pair of sub-pixels beneath a second microlens,
the second pair of sub-pixels is aligned in a second direction,
the second direction is perpendicular to the first direction,
the first plurality of pixels includes a plurality of signal processing circuits,
each pixel of the at least one first pixel and the at least one second pixel includes a respective photoelectric conversion section for each sub-pixel included in the first pair of sub-pixels and the second pair of sub-pixels,
each electrode of a plurality of electrodes of the plurality of signal processing circuits is around a planar region associated with the respective photoelectric conversion section, and
the plurality of electrodes includes a dummy electrode electrically coupled to ground.

2. The solid-state imaging device according to claim 1 , wherein planar shapes obtained based on combination of the first pair of sub-pixels and the second pair of sub-pixels are identical.

3. The solid-state imaging device according to claim 1 , wherein planar shapes obtained based on combination of the first pair of sub-pixels and the second pair of sub-pixels are fourfold symmetric shapes.

4. The solid-state imaging device according to claim 1 , wherein planar shapes of sub-pixels included in the first pair of sub-pixels are identical with planar shapes of sub-pixels included in the second pair of sub-pixels.

5. The solid-state imaging device according to claim 1 , wherein
the respective photoelectric conversion section is configured to convert the received light into an electric charge,
each signal processing circuit of the plurality of signal processing circuits includes:
an FD section configured to accumulate the electric charge outputted from the respective photoelectric conversion section,
an amplification transistor controlled by the electric charge to turn on/off,
a selection transistor between the amplification transistor and a vertical signal line, and
a reset transistor configured to reset the electric charge accumulated in the FD section.

6. The solid-state imaging device according to claim 5 , wherein the FD section is shared between respective sub-pixels included in the first pair of sub-pixels and the second pair of sub-pixels.

7. The solid-state imaging device according to claim 6 , wherein the FD section is in a center of a planar shape obtained based on combination of the first pair of sub-pixels and the second pair of sub-pixels.

8. The solid-state imaging device according to claim 7 , wherein a center of the FD section is identical with a center of a respective microlens.

9. The solid-state imaging device according to claim 5 , wherein
a signal processing circuit of the plurality of signal processing circuits is shared between a second plurality of pixels, and
the second plurality of pixels includes at least one of the at least one first pixel or the at least one second pixel.

10. The solid-state imaging device according to claim 5 , wherein the respective photoelectric conversion section is inside a semiconductor substrate of the pixel array.

11. The solid-state imaging device according to claim 10 , wherein the respective photoelectric conversion section extends inside the semiconductor substrate on a planar region associated with a respective signal processing circuit of the plurality of signal processing circuits.

12. The solid-state imaging device according to claim 5 , wherein each signal processing circuit of the plurality of signal processing circuits is around a planar region associated with the respective photoelectric conversion section.

13. The solid-state imaging device according to claim 12 , wherein
each electrode has an identical positional relationship with a respective sub-pixel included in the first pair of sub-pixels and the second pair of sub-pixels.

14. The solid-state imaging device according to claim 5 , wherein each of the at least one first pixel and the at least one second pixel includes an identical layout of wiring lines of a respective signal processing circuit of the plurality of signal processing circuits.

15. The solid-state imaging device according to claim 1 , wherein each of the at least one first pixel and the at least one second pixel is a green pixel configured to receive green light.

16. An electronic apparatus, comprising:
a solid-state imaging device including:
a pixel array, wherein
a plurality of pixels is arrayed in the pixel array,
each pixel of the plurality of pixels is configured to receive light in a specific wavelength band,
at least one first pixel of the plurality of pixels includes a first pair of sub-pixels beneath a first microlens,
the first pair of sub-pixels is aligned in a first direction,
at least one second pixel of the first plurality of pixels includes a second pair of sub-pixels provided beneath a second microlens,
the second pair of sub-pixels is aligned in a second direction,
the second direction is perpendicular to the first direction,
the plurality of pixels includes a plurality of signal processing circuits,
each pixel of the at least one first pixel and the at least one second pixel includes a respective photoelectric conversion section for each sub-pixel included in the first pair of sub-pixels and the second pair of sub-pixels,
each electrode of a plurality of electrodes of the plurality of signal processing circuits is around a planar region associated with the respective photoelectric conversion section, and
the plurality of electrodes includes a dummy electrode electrically coupled to ground.

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Azami Kenji

Classifications

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/46 Primary

  by combining or binning pixels · CPC title

• H04N25/10

  for transforming different wavelengths into image signals · CPC title

• H04N25/778

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H04N25/704 Primary

  Pixels specially adapted for focusing, e.g. phase difference pixel sets · CPC title