Boost DC-DC converter using DSM, duty controller for boost DC-DC converter, and method for configuring duty controller

Patent metadata

Field	Value
Publication number	US-11290014-B2
Application number	US-202016939567-A
Country	US
Kind code	B2
Filing date	Jul 27, 2020
Priority date	Aug 2, 2019
Publication date	Mar 29, 2022
Grant date	Mar 29, 2022

Abstract

A boost direct current-to-direct current (DC-DC) converter using a delta-sigma modulator (DSM), the boost DC-DC converter may comprise a boost driving circuit outputting an output voltage to output terminals by boosting an input voltage, a resistance distribution circuit outputting a feedback voltage by distributing the output voltage of the boost driving circuit, a compensator outputting a compensated feedback voltage by compensating for the feedback voltage outputted by the resistance distribution circuit based on a reference voltage, a delta-sigma modulator outputting a digital signal by modulating the compensated feedback voltage and a duty controller outputting a duty control signal for controlling a switching duty of the boost driving circuit by receiving the output of the delta-sigma modulator.

First claim

What is claimed is:

1. A boost direct current-to-direct current (DC-DC) converter using a delta-sigma modulator (DSM), the boost DC-DC converter comprising:
a boost driving circuit configured to boost an input voltage, to output an output voltage to an output terminal;
a resistance distribution circuit configured to distribute the output voltage of the boost driving circuit, and to output a feedback voltage;
compensator configured to compensate for the feedback voltage outputted by the resistance distribution circuit based on a reference voltage, and to output a compensated feedback voltage;
a delta-sigma modulator (DSM) configured to modulate the compensated feedback voltage, and to output as a digital signal; and
a duty controller configured to receive the output of the DSM, and to output a duty control signal for controlling a switching duty of the boost driving circuit,
wherein the duty controller includes:
a delay module delaying the output of the DSM; and
a shot-signal generator outputting a shot signal by receiving a plurality of delayed signals delayed by the delay module,
wherein the shot signal and at least one of the plurality of delayed signals are combined to output the duty control signal.

2. The boost DC-DC converter according to claim 1 , wherein the boost driving circuit includes a plurality of power switches outputting a boosted input voltage by boosting the input voltage according to switching operations.

3. The boost DC-DC converter according to claim 2 , wherein the duty control signal is a signal for determining a duty ratio between the plurality of power switches based on the digital signal.

4. The boost DC-DC converter according to claim 1 , wherein the boost driving circuit includes:
a serial inductor circuit including one end receiving the input voltage and the other end connected to a first electric contact;
a first switch circuit including one end connected to the first electric contact and the other end grounded; and
a second switch circuit including one end connected to the first electric contact and the other end connected to the output terminal.

5. The boost DC-DC converter according to claim 1 , wherein the delay module includes a plurality of D flip-flops delaying the output of the DSM.

6. The boost DC-DC converter according to claim 5 ,
wherein the plurality of D flip-flops are configured by connecting an output of a preceding D flip-flop to an input of a next D flip-flop,
wherein outputs of the D flip-flops are the plurality of delayed signals, respectively.

7. The boost DC-DC converter according to claim 1 , wherein the shot-signal generator includes a single D flip-flop configured to receive the plurality of delayed signals and inverse feedback of the shot signal, to output the shot signal.

8. The boost DC-DC converter according to claim 7 , wherein the shot-signal generator includes:
a NOR gate configured to receive the plurality of delayed signals, and to output an output signal; and
an AND gate configured to receive the output signal of the NOR gate and an inverse shot signal by inverse feedback of the shot signal, and to provide an input of the single D flip-flop.

9. The boost DC-DC converter according to claim 1 , wherein the duty controller includes an OR gate configured to receive the shot signal and a signal obtained by delaying the output of the DSM by one cycle among the plurality of delayed signals, and to output the duty control signal.

10. A duty controller for a boost direct current-to-direct current (DC-DC) converter, the duty controller comprising:
a delay module configured to delay an output of a delta-sigma modulator (DSM) included in the boost DC-DC converter; and
a shot-signal generator configured to receive a plurality of delayed signals delayed by the delay module, and to output a shot signal,
wherein the shot signal and at least one of the plurality of delayed signals are combined to output a duty control signal for a plurality of power switches included in the boost DC-DC converter.

11. The duty controller according to claim 10 , wherein the delay module includes a plurality of D flip-flops delaying the output of the delta-sigma modulator.

12. The duty controller according to claim 11 , wherein the plurality of D flip-flops are configured by connecting an output of a preceding D flip-flop to an input of a next D wherein outputs of the D flip-flops are the plurality of delayed signals, respectively.

13. The duty controller according to claim 10 , receiving the plurality of delayed signals and inverse feedback of the shot signal, and outputting the shot signal.

14. The duty controller according to claim 3 , wherein the shot-signal generator includes:
a NOR gate configured to receive the plurality of delayed signals, to output an output signal; and
an AND gate configured to receive the output signal of the NOR gate and an inverse shot signal that is the inverse feedback of the shot signal, and provide for an input of a single D flip-flop.

15. The duty controller according to claim 10 , wherein the duty controller includes an OR gate outputting a duty ratio signal by receiving the shot signal and a signal obtained by delaying the output of the DSM by one cycle among the plurality of delayed signals.

16. A method for configuring a duty controller for a boost direct current-to-direct current (DC-DC) converter, the method comprising:
determining a first number of D flip-flops included in a delay module of the duty controller;
operating the duty controller in a steady state by using the determined number of D flip-flops;
measuring an output voltage of the operated duty controller;
comparing a measured output voltage with a target voltage;
determining a second number of D flip-flops based on a result of the comparing of the measured output voltage with the target voltage; and
configuring the duty controller for the boost DC-DC converter by using a second number of D flip-flops,
wherein the first number of D flip-flops is different from the second number of D flip-flops.

17. The method according to claim 16 , wherein the duty controller includes:
a delay module delaying an output of a delta-sigma modulator (DSM) included in the boost DC-DC converter; and
a shot-signal generator outputting a shot signal by receiving a plurality of delayed signals delayed by the delay module,
wherein the shot signal and at least one of the plurality of delayed signals are combined to output a duty control signal for a plurality of power switches included in the boost DC-DC converter.

18. The method according, to claim 17 ,
increasing or decreasing the second number of D flip-flops; and
reprocessing the operating the duty controller in the steady state.

19. The method according to claim 18 , wherein the reprocessing the operating the duty controller in the steady state includes sequentially decreasing the number of D flip-flops from a maximum number or sequentially increasing the number of D flip-flops from a minimum number.

Assignees

• Electronics & Telecommunications Res Inst

Inventors

• Cho Young Kyun
• Kim Tae Joong
• Lee Kwang Chun
• Lee Jung Nam
• Jung Jae Ho

Classifications

• H02M1/38

  Means for preventing simultaneous conduction of switches · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/083

  for the ignition at the zero crossing of the voltage or the current · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title