Pixel driving circuit, organic light emitting display panel and pixel driving method

US11289004B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11289004-B2
Application numberUS-201816327629-A
CountryUS
Kind codeB2
Filing dateSep 5, 2018
Priority dateDec 8, 2017
Publication dateMar 29, 2022
Grant dateMar 29, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A pixel driving circuit, an organic light emitting display panel and a pixel driving method. The pixel driving circuit includes: a switching sub-circuit, a driving sub-circuit, a storage capacitor and a charge eliminating sub-circuit; the charge eliminating sub-circuit has a control terminal connected to a first scanning signal line, and other terminals connected to the first terminal of the driving sub-circuit, a cathode of the organic light emitting element (OLED) and a reference voltage terminal respectively, and can enable a potential between the anode and the cathode of the organic light emitting element to be reversed under control of the first scanning signal line.

First claim

Opening claim text (preview).

What is claimed is: 1. A pixel driving circuit, comprising: a switching sub-circuit having a control terminal connected to a first scanning signal line, a first terminal connected to a data signal line, and a second terminal connected to a control terminal of a driving sub-circuit, and configured to write a data voltage outputted by the data signal fine; the driving sub-circuit having a first terminal connected to a power supply voltage terminal and a second terminal connected to an anode of an organic light emitting element, and configured to drive the organic light emitting element to emit fight under control of the switching sub-circuit; a storage capacitor having one terminal connected to the control terminal of the driving sub-circuit and the other terminal connected to the first terminal of the driving sub-circuit, and configured to store the data voltage outputted by the data signal line; and a charge eliminating sub-circuit having a control terminal connected to a second scanning signal fine, and other terminals connected to the first terminal of the driving sub-circuit, a cathode of the organic light emitting element and a reference voltage terminal respectively, and configured to reverse a potential between the anode and the cathode of the organic fight emitting element under control of the second scanning signal line. 2. The pixel driving circuit according to claim 1 . wherein the switching sub-circuit comprises a first transistor, wherein a gate of the first transistor serves as the control terminal of the switching sub-circuit, a first electrode of the first transistor serves as the first terminal of the switching sub-circuit, and a second electrode of the first transistor serves as the second terminal of the switching sub-circuit. 3. The pixel driving circuit according to claim 1 , wherein the driving sub-circuit comprises a second transistor, wherein a gate of the second transistor serves as the control terminal of the driving sub-circuit, a first electrode of the second transistor serves as the first terminal of the driving sub-circuit, and a second electrode of the second transistor serves as the second terminal of the driving sub-circuit. 4. The pixel driving circuit according to a claim 1 , wherein the charge eliminating sub-circuit comprises a third transistor and a fourth transistor, wherein a gate of the third transistor and a gate of the fourth transistor serve as the control terminal of the charge eliminating sub-circuit, and are connected to the second scanning signal line; a first electrode of the third transistor is connected to the first terminal of the driving sub-circuit, and a second electrode of the third transistor is connected to the cathode of the organic light emitting element; a first electrode of the fourth transistor is connected to the cathode of the organic light emitting element, and a second electrode of the fourth transistor is connected to the reference voltage terminal. 5. The pixel driving circuit according to claim 4 , wherein one of the third transistor and the fourth transistor is of an N-type transistor, and the other of the third transistor and the fourth transistor is of a P-type transistor. 6. A method applied to the pixel driving circuit according to claim 1 , the method comprising: controlling, by the scanning signal inputted from the second scanning signal line, the charge eliminating sub-circuit to reverse the potential between the anode and the cathode of the organic light emitting element; and controlling, by the first scanning signal line, the switching sub-circuit to write the data voltage outputted from the data signal line to the storage capacitor for storage, and controlling, by the driving sub-circuit, the organic light emitting element to emit light. 7. The method according to claim 6 , further comprising: controlling, by the third scanning signal line, the gate voltage resetting sub-circuit to reset the gate voltage of the driving sub-circuit. 8. The pixel driving circuit according to claim 1 , further comprising: a gate voltage resetting sub-circuit having a control terminal connected to a third scanning signal line, and other terminals connected to the cathode of the organic light emitting element, the control terminal of the driving sub-circuit and the reference voltage terminal respectively, and configured to reset a gate voltage of the driving sub-circuit under control of the third scanning signal line. 9. The pixel driving circuit according to claim 2 , wherein the first scanning signal line is a scanning signal line for a present row, the second scanning signal line and the third scanning signal line are both a scanning signal line for a previous row. 10. The pixel driving circuit according to claim 8 , wherein the gate voltage resetting sub-circuit comprises a fifth transistor and a sixth transistor; a gate of the sixth transistor serves as the control terminal of the gate voltage resetting sub-circuit, a first electrode of the sixth transistor is connected to the cathode of the organic light emitting element, and a second electrode of the sixth transistor is connected to a gate of the fifth transistor; a first electrode of the fifth transistor is connected to the control terminal of the driving sub-circuit, and a second electrode of the fifth transistor is connected to the reference voltage terminal. 11. The pixel driving circuit according to claim 10 , wherein the fifth transistor and the sixth transistor are both of N-type transistors or both of P-type transistors. 12. An organic light emitting display panel, comprising a plurality of pixel cells, a plurality of scanning signal lines and a plurality of data signal lines, wherein respective pixel cells are arranged in areas defined by intersection of the scanning signal lines and the data signal lines, each pixel cell includes an organic light emitting element and the pixel driving circuit according to any claim 1 . 13. The organic light emitting display panel according to claim 12 , wherein the switching sub-circuit comprises a first transistor, wherein a gate of the first transistor serves as the control terminal of the switching sub-circuit, a first electrode of the first transistor serves as the first terminal of the switching sub-circuit, and a second electrode of the first transistor serves as the second terminal of the switching sub-circuit. 14. The organic light emitting display pan& according to claim 12 , wherein the driving sub-circuit comprises a second transistor, wherein a gate of the second transistor serves as the control terminal of the driving sub-circuit, a first electrode of the second transistor serves as the first terminal of the driving sub-circuit, and a second electrode of the second transistor serves as the second terminal of the driving sub-circuit. 15. The organic light emitting display panel according to claim 12 , wherein the charge eliminating sub-circuit comprises a third transistor and a fourth transistor, wherein a gate of the third transistor and a gate of the fourth transistor serve as the control terminal of the charge eliminating sub-circuit, and are connected to the second scanning signal line; a first electrode of the third transistor is connected to the first terminal of the driving sub-circuit, and a second electrode of the third transistor is connected to the cathode of the organic light emitting element; a first electrode of the fourth transistor is connected to the cathode of the organic light emitting element, and a second electrode of the fourth transistor is connected to the reference voltage terminal. 16. The orga

Assignees

Inventors

Classifications

  • in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements · CPC title

  • G09G3/3266Primary

    Details of drivers for scan electrodes · CPC title

  • G09G3/2092Primary

    Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165) · CPC title

  • for resetting or blanking · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

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What does patent US11289004B2 cover?
A pixel driving circuit, an organic light emitting display panel and a pixel driving method. The pixel driving circuit includes: a switching sub-circuit, a driving sub-circuit, a storage capacitor and a charge eliminating sub-circuit; the charge eliminating sub-circuit has a control terminal connected to a first scanning signal line, and other terminals connected to the first terminal of the dr…
Who is the assignee on this patent?
Hefei Boe Optoelectronics Tech, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3266. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 29 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).