Method, device, and computer program product for managing data transfer

US11281610B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11281610-B2
Application numberUS-202017064763-A
CountryUS
Kind codeB2
Filing dateOct 7, 2020
Priority dateAug 7, 2020
Publication dateMar 22, 2022
Grant dateMar 22, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present disclosure relate to a method, a device, and a computer program product for managing data transfer. A method for managing data transfer is provided, including: if determining that a request to transfer a data block between a memory and a persistent memory of a data storage system is received, obtaining a utilization rate of a central processing unit of the data storage system; and determining, from a first transfer technology and a second transfer technology and at least based on the utilization rate of the central processing unit, a target transfer technology for transferring a data block between the memory and the persistent memory, the first transfer technology transferring data through direct access to the memory, and the second transfer technology transferring data through the central processing unit. Therefore, the embodiments of the present disclosure can improve the data transfer performance of the storage system.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for managing data transfer, comprising: if determining that a request to transfer a data block between a memory and a persistent memory of a data storage system is received, obtaining a utilization rate of a central processing unit of the data storage system, wherein the utilization rate is obtained through a data storage system bus; and determining, from a first transfer technology and a second transfer technology and at least based on the utilization rate of the central processing unit, a target transfer technology for transferring a data block between the memory and the persistent memory, the first transfer technology transferring data through direct access to the memory, and the second transfer technology transferring data through the central processing unit, wherein determining the target transfer technology comprises if determining that the utilization rate is lower than a threshold utilization rate, determining the second transfer technology as the target transfer technology, wherein the first transfer technology is an input-output accelerated direct memory access technology, the input-output accelerated direct memory access technology using parallel channels to transfer data, and wherein the second transfer technology is a central processing unit memory replication technology, the central processing unit memory replication technology transferring data in a serial manner. 2. The method according to claim 1 , wherein determining the target transfer technology further comprises: if determining that the utilization rate is higher than or equal to the threshold utilization rate, obtaining a size of the data block to be transferred, and determining the target transfer technology based on the size of the data block. 3. The method according to claim 2 , wherein determining the target transfer technology based on the size of the data block comprises: if determining that the size of the data block is larger than a threshold size, determining the first transfer technology as the target transfer technology, wherein the threshold size is determined by reading a threshold size table storing a plurality of preset threshold sizes for different data storage systems; and if determining that the size of the data block is smaller than or equal to the threshold size, determining the second transfer technology as the target transfer technology. 4. The method according to claim 2 , wherein the threshold size is preset based on at least one of a hardware configuration of the data storage system, central processing unit performance, and a size distribution of the data block. 5. The method according to claim 1 , wherein the data storage system is a storage system for deduplication process comprising a data stream buffer and a slice. 6. The method according to claim 1 , further comprising: in response to determining that the received request to transfer the data block between the memory and the persistent memory of the data storage system is not the request from a data domain, directly determining to use the central processing unit memory replication technology to transfer data associated with the request. 7. An electronic device, comprising: at least one processor; and at least one memory storing computer program instructions, the at least one memory and the computer program instructions being configured to cause, together with the at least one processor, the electronic device to perform actions comprising: if determining that a request to transfer a data block between a memory and a persistent memory of a data storage system is received, obtaining a utilization rate of a central processing unit of the data storage system, wherein the utilization rate is obtained through a data storage system bus; and determining, from a first transfer technology and a second transfer technology and at least based on the utilization rate of the central processing unit, a target transfer technology for transferring a data block between the at least one memory and the persistent memory, the first transfer technology transferring data through direct access to the at least one memory, and the second transfer technology transferring data through the central processing unit, wherein determining the target transfer technology comprises if determining that the utilization rate is lower than a threshold utilization rate, determining the second transfer technology as the target transfer technology, wherein the first transfer technology is an input-output accelerated direct memory access technology, the input-output accelerated direct memory access technology using parallel channels to transfer data, and wherein the second transfer technology is a central processing unit memory replication technology, the central processing unit memory replication technology transferring data in a serial manner. 8. The electronic device according to claim 7 , wherein determining the target transfer technology further comprises: if determining that the utilization rate is higher than or equal to the threshold utilization rate, obtaining a size of the data block to be transferred, and determining the target transfer technology based on the size of the data block. 9. The electronic device according to claim 8 , wherein determining the target transfer technology based on the size of the data block comprises: if determining that the size of the data block is larger than a threshold size, determining the first transfer technology as the target transfer technology, wherein the threshold size is determined by reading a threshold size table storing a plurality of preset threshold sizes for different data storage systems; and if determining that the size of the data block is smaller than or equal to the threshold size, determining the second transfer technology as the target transfer technology. 10. The electronic device according to claim 7 , wherein the data storage system is a storage system for deduplication process comprising a data stream buffer and a slice. 11. A computer program product tangibly stored in a non-transitory computer storage medium and including machine-executable instructions, which when executed by a device, cause the device to perform actions, the actions comprising: if determining that a request to transfer a data block between a memory and a persistent memory of a data storage system is received, obtaining a utilization rate of a central processing unit of the data storage system, wherein the utilization rate is obtained through a data storage system bus; and determining, from a first transfer technology and a second transfer technology and at least based on the utilization rate of the central processing unit, a target transfer technology for transferring a data block between the memory and the persistent memory, the first transfer technology transferring data through direct access to the memory, and the second transfer technology transferring data through the central processing unit, wherein determining the target transfer technology comprises if determining that the utilization rate is lower than a threshold utilization rate, determining the second transfer technology as the target transfer technology, wherein the first transfer technology is an input-output accelerated direct memory access technology, the input-output accelerated direct memory access technology using parallel channels to transfer data, and wherein the second transfer technology is a central processing unit memory replication technology, the central processing unit memory replication technology transferring data in a serial manner. 12. The computer program product according to claim 11 , wherein determinin

Assignees

Inventors

Classifications

  • Disk arrays, e.g. RAID, JBOD · CPC title

  • Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • by changing the state or mode of one or more devices · CPC title

  • in relation to data integrity, e.g. data losses, bit errors · CPC title

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Frequently asked questions

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What does patent US11281610B2 cover?
Embodiments of the present disclosure relate to a method, a device, and a computer program product for managing data transfer. A method for managing data transfer is provided, including: if determining that a request to transfer a data block between a memory and a persistent memory of a data storage system is received, obtaining a utilization rate of a central processing unit of the data storag…
Who is the assignee on this patent?
Emc Ip Holding Co Llc
What technology area does this patent fall under?
Primary CPC classification G06F3/061. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 22 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).