Flexible Ethernet switching systems and methods

US11277217B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11277217-B2
Application numberUS-201916564498-A
CountryUS
Kind codeB2
Filing dateSep 9, 2019
Priority dateJun 30, 2015
Publication dateMar 15, 2022
Grant dateMar 15, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A switch system includes interface circuitry configured to ingress and egress clients each including a stream of encoded blocks; and switch circuitry configured to switch the clients between the interface circuitry based on block boundaries of the stream of encoded blocks. The stream of encoded blocks can include 64 b/66 b encoding. Each block in the stream of encoded blocks can be switched intact.

First claim

Opening claim text (preview).

What is claimed is: 1. A switch system comprising: interface circuitry connected to ports, wherein the ports receive and transmit clients, each client includes a sequence of encoded blocks and each block is one of a data block and a control block, wherein the interface circuitry performs idle adaptation; and switch circuitry that switches at least one of the clients between the ports via the interface circuitry, wherein the sequence of encoded blocks of the at least one of the clients is switched at corresponding block boundaries, and wherein the sequence of encoded blocks include flexible ethernet clients. 2. The switch system of claim 1 , wherein the respective sequence of encoded blocks for each client utilizes 64b/66b encoding. 3. The switch system of claim 1 , wherein each block in the respective sequence of encoded blocks is switched intact. 4. The switch system of claim 1 , wherein the switch circuitry utilizes a synchronous switching scheme. 5. The switch system of claim 1 , wherein the switch circuitry includes a cell switch, and wherein the respective sequence of encoded blocks of the clients are SARed (Segmentation and Reassembly) using Optical Transport Network (OTN) over Packet (OFP) techniques and switched as a sequence across the cell switch. 6. The switch system of claim 5 , wherein the OFP techniques accumulate the respective sequence of encoded blocks of one or more calendar slots in a calendar with packets sized by +/−one byte to a signal source rate with timing transfer. 7. The switch system of claim 5 , wherein the OFP techniques accumulate the respective sequence of encoded blocks of one or more calendar slots in a calendar with fixed sized packets with no timing transfer. 8. The switch system of claim 5 , wherein the cell switch utilizes a phase aligned clock to deskew at an egress of the clients. 9. The switch system of claim 1 , wherein the switch circuitry accumulates 66b blocks of one or more calendar slots in a calendar from the clients and transcodes the 66b blocks into 257b blocks. 10. The switch system of claim 1 , wherein the interface circuitry performs timing synchronization including phase and frequency alignment between the block boundaries. 11. A switch system comprising: interface circuitry connected to ports, wherein the ports receive and transmit clients, each client includes a sequence of encoded blocks and each block is one of a data block and a control block; and switch circuitry that switches at least one of the clients between the ports via the interface circuitry, wherein the sequence of encoded blocks of the at least one of the clients is switched at corresponding block boundaries, and wherein the sequence of encoded blocks include flexible ethernet clients, wherein the switch circuitry includes a cell switch, and wherein the respective sequence of encoded blocks of the clients are SARed (Segmentation and Reassembly) using Optical Transport Network (OTN) over Packet (OFP) techniques and switched as a sequence across the cell switch. 12. The switch system of claim 11 , wherein the respective sequence of encoded blocks for each client utilizes 64b/66b encoding. 13. The switch system of claim 11 , wherein the OFP techniques accumulate the respective sequence of encoded blocks of one or more calendar slots in a calendar with packets sized by +/−one byte to a signal source rate with timing transfer. 14. The switch system of claim 11 , wherein the OFP techniques accumulate the respective sequence of encoded blocks of one or more calendar slots in a calendar with fixed sized packets with no timing transfer. 15. The switch system of claim 11 , wherein the cell switch utilizes a phase aligned clock to deskew at an egress of the clients. 16. The switch system of claim 11 , wherein the interface circuitry performs timing synchronization including phase and frequency alignment between the block boundaries. 17. A switch system comprising: interface circuitry connected to ports, wherein the ports receive and transmit clients, each client includes a sequence of encoded blocks and each block is one of a data block and a control block; and switch circuitry that switches at least one of the clients between the ports via the interface circuitry, wherein the sequence of encoded blocks of the at least one of the clients is switched at corresponding block boundaries, wherein the switch circuitry accumulates 66b blocks of one or more calendar slots in a calendar from the clients and transcodes the 66b blocks into 257b blocks, and wherein the sequence of encoded blocks include flexible ethernet clients. 18. The switch system of claim 17 , wherein each block in the respective sequence of encoded blocks is switched intact. 19. The switch system of claim 17 , wherein the switch circuitry utilizes a synchronous switching scheme. 20. The switch system of claim 17 , wherein the switch circuitry includes a cell switch, and wherein the respective sequence of encoded blocks of the clients are SARed (Segmentation and Reassembly) using Optical Transport Network (OTN) over Packet (OFP) techniques and switched as a sequence across the cell switch.

Assignees

Inventors

Classifications

  • H04J3/1658Primary

    carrying packets or ATM cells; (H04J3/1664 takes precedence for payloads with different packet types) · CPC title

  • for local area network [LAN], e.g. Ethernet switches · CPC title

  • for time-division multiplexing {(H04Q11/0001 takes precedence)} · CPC title

  • Support for services · CPC title

  • Switching fabrics, e.g. transport network, control network · CPC title

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What does patent US11277217B2 cover?
A switch system includes interface circuitry configured to ingress and egress clients each including a stream of encoded blocks; and switch circuitry configured to switch the clients between the interface circuitry based on block boundaries of the stream of encoded blocks. The stream of encoded blocks can include 64 b/66 b encoding. Each block in the stream of encoded blocks can be switched int…
Who is the assignee on this patent?
Ciena Corp
What technology area does this patent fall under?
Primary CPC classification H04J3/1658. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 15 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).