Graphics processing systems with conditional evictions

Patent metadata

Field	Value
Publication number	US-11276137-B1
Application number	US-202117201229-A
Country	US
Kind code	B1
Filing date	Mar 15, 2021
Priority date	Jan 29, 2021
Publication date	Mar 15, 2022
Grant date	Mar 15, 2022

Abstract

There is provided a graphics processor comprising a programmable execution unit operable to execute programs for respective execution thread groups. An eviction checking circuit is provided that is configured to check instructions as they are being fetched for execution from an instruction cache to determine whether the instruction includes any conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads. The eviction checking circuit is then configured to check whether any conditional eviction conditions are satisfied at this point and either allow the execution unit to continue program execution or cause the thread group to be evicted.

First claim

The invention claimed is:

1. A graphics processor comprising:
a programmable execution unit operable to execute programs to perform processing operations, and in which when executing a program, the execution unit executes the program for respective groups of one or more execution threads;
an instruction cache that stores instructions for programs to be executed by the execution unit, wherein when executing a program for a respective group of one or more execution threads, the execution unit is arranged to fetch the instructions in the program from the instruction cache for execution; and
an eviction checking circuit that is configured to, for an instruction being fetched for a respective group of execution threads from the instruction cache, before the instruction is executed:
determine whether the instruction includes one or more conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads; and
when it is determined that the instruction includes one or more conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads, determine whether or not the conditional eviction conditions are met;

wherein, in response to the determination whether or not the conditional eviction conditions are met:
when it is determined that the conditional eviction conditions are met, the eviction checking circuit allows the execution unit to continue execution of the program for the group of execution threads;
whereas when it is determined that the conditional eviction conditions are not met, the eviction checking circuit causes the execution unit to evict the group of execution threads to which the instruction relates.

2. The graphics processor of claim 1 , wherein:
the one or more conditional eviction conditions include one or more dependency conditions, wherein if the dependency condition is not met, the next instruction in the program should not be executed for the group of execution threads.

3. The graphics processor of claim 2 , wherein:
the one or more dependency conditions include a wait modifier indicating one or more data dependencies on which the execution of the program should wait, and wherein the determining whether or not the dependency conditions are met comprises checking a corresponding one or more dependency counters tracking the dependency conditions.

4. The graphics processor of claim 3 , wherein:
when it is determined that the instruction includes one or more dependency conditions that need to be checked before the next instruction in the program can be executed the eviction checking circuit is configured to check the dependency counters for all of the dependency conditions that are being tracked without checking if the respective dependency conditions apply to the instruction in question and to evict the group of execution threads executing the program to which the instruction relates when it is determined that any of the dependency conditions that are being tracked by the dependency counters are not met.

5. The graphics processor of claim 1 , wherein:
the eviction checking circuit is further configured to determine whether the instruction is associated with any unconditional eviction conditions that if present indicate the group of execution threads to which the instruction relates should always be evicted.

6. The graphics processor of claim 5 , wherein:
the eviction checking circuit is configured to determine whether the instruction includes any unconditional eviction conditions prior to determining whether the instruction includes one or more conditional eviction conditions, and wherein when it is determined that the instruction includes any unconditional eviction conditions, the eviction checking circuit causes the execution unit to evict the group of execution threads without checking whether the instruction includes one or more conditional eviction conditions or whether any condition eviction conditions are met.

7. The graphics processor of claim 5 , wherein:
the unconditional eviction conditions include one or more of: (i) that the instruction comprises a messaging instruction; (ii) that the next instruction in the program comprises a messaging instruction; and (iii) that the instruction comprises a branch instruction.

8. The graphics processor of claim 1 , wherein:
when it is determined based on the determination of whether the one or more dependency conditions associated with the instruction are satisfied that the execution thread group should be evicted due to one or more unmet conditional eviction conditions, the evicted execution thread group is passed to a thread group execution controller circuit for subsequent re-scheduling.

9. The graphics processor of claim 1 , wherein:
when it is determined that an execution thread group should be evicted, the instruction is marked as the last instruction in the program to trigger an eviction of the group of execution threads executing the program to which the instruction relates when the execution unit executes the instruction.

10. The graphics processor of claim 1 , wherein:
when it is determined that an execution thread group should be evicted, the group of execution threads executing the program to which the instruction relates is immediately evicted.

11. A method of operating a graphics processor, the graphics processor comprising:
a programmable execution unit operable to execute programs to perform processing operations, and in which when executing a program, the execution unit executes the program for respective groups of one or more execution threads; and
an instruction cache that stores instructions for programs to be executed by the execution unit, wherein when executing a program for a respective group of one or more execution threads, the execution unit is arranged to fetch the instructions in the program from the instruction cache for execution;
the method comprising:
when an instruction is fetched for a respective group of execution threads from the instruction cache, before the instruction is executed:
determining whether the instruction includes one or more conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads;
when it is determined that the instruction includes one or more conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads, determine whether or not the conditional eviction conditions are met; and
in response to the determination whether or not the conditional eviction conditions are met, either:
continuing execution of the program for the group of execution threads when it is determined that the conditional eviction conditions are met; or
evicting the group of execution threads to which the instruction relates when it is determined that the conditional eviction conditions are not met.

12. The method of claim 11 , wherein:
the one or more conditional eviction conditions include one or more dependency conditions, wherein if the dependency condition is not met, the next instruction in the program should not be executed for the group of execution threads.

13. The method of claim 11 , wherein:
the one or more dependency conditions include a wait modifier indicating one or more data dependencies on which the execution of the program should wait, and wherein the determining whether or not

Assignees

• Advanced Risc Mach Ltd

Inventors

• Sideris Isidoros
• Forey Stephane
• Stoye William Robert
• Robson John David

Classifications

• G06T15/80

  Shading · CPC title

• G06T1/20 Primary

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06T15/005

  General purpose rendering architectures · CPC title

• G06T1/60

  Memory management · CPC title