Opportunistic data analytics using memory bandwidth in disaggregated computing systems

Patent metadata

Field	Value
Publication number	US-11275619-B2
Application number	US-201916564147-A
Country	US
Kind code	B2
Filing date	Sep 9, 2019
Priority date	May 16, 2016
Publication date	Mar 15, 2022
Grant date	Mar 15, 2022

Abstract

Respective memory devices are assigned to respective processor devices in a disaggregated computing system, the disaggregated computing system having at least a pool of the memory devices and a pool of the processor devices. An iterative learning algorithm is used to define data boundaries of a dataset for performing an analytic function on the dataset simultaneous to a primary compute task, unrelated to the analytic function, being performed on the dataset in the pool of memory devices using memory bandwidth not currently committed to the primary compute task, thereby efficiently employing the unused memory bandwidth to prevent underutilization of the pool of memory devices.

First claim

What is claimed is:

1. A method for optimizing memory bandwidth in a disaggregated computing system, by a processor device, comprising:
assigning respective memory devices to respective processor devices in the disaggregated computing system, the disaggregated computing system having at least a pool of the memory devices and a pool of the processor devices;
using an iterative learning algorithm to define data boundaries of a dataset for performing an analytic function on the dataset using memory bandwidth not currently committed to a primary compute task such that the analytic function is performed on the dataset being resident in one of the memory devices in the pool of memory devices using unused memory bandwidth otherwise allocated to the primary compute task associated with the dataset resident in the one of the memory devices to extract information to aid in processing the resident dataset, wherein performing the analytic function comprises connecting one of the processor devices, not previously assigned to the one of the memory devices, to the one of the memory devices in real-time to opportunistically perform an analysis on the dataset which otherwise would not have been performed during a course of performing a workload corresponding to the dataset, and wherein the dataset is selected with which to perform the analysis based on a percentage of the dataset most represented in the one of the memory devices as opposed to a percentage of the dataset residing in secondary storage; and
in conjunction with using the iterative learning algorithm, monitoring an initial data load, for a predetermined amount of time or until a predetermined quantity of data has been monitored, and ongoing data access patterns of the dataset to build a continually updated data boundary map for performing the analytic function, wherein the continually updated data boundary map is inclusive of an identifier and associated memory location for each segment of the data of the dataset.

2. The method of claim 1 , further including receiving user input for designating certain processor devices of the pool of processor devices to be used to perform computation of the analytic function.

3. The method of claim 2 , further including using the one of the processor devices selected from designated processor devices of the pool of processor devices to perform computation of the analytic function when the designated processor devices are determined to be idle.

4. The method of claim 1 , further including performing at least one of:
providing a training phase time threshold (TPTT) defining the predetermined amount of time the ongoing data access patterns are to be observed for building an initial data boundary map, the initial data boundary map iteratively updated to become the continually updated data boundary map;
providing a training phase size threshold (TPST) defining the predetermined quantity of data to be mapped in the initial data boundary map; and
upon not providing the TPTT or the TPST, observing and comparing the ongoing data access patterns to access patterns of previous workloads.

5. The method of claim 4 , wherein the iterative learning algorithm includes accounting for at least one of movement of data blocks of the dataset between a secondary storage and the pool of memory devices, new data block creation, and data block deletion.

6. The method of claim 5 , further including using the continually updated data boundary map to track and target coverage of the analytic function of the dataset in real-time.

7. A system for optimizing memory bandwidth in a disaggregated computing system, the system comprising:
at least one processor device, wherein the at least one processor device:
assigns respective memory devices to respective processor devices in the disaggregated computing system, the disaggregated computing system having at least a pool of the memory devices and a pool of the processor devices;
uses an iterative learning algorithm to define data boundaries of a dataset for performing an analytic function on the dataset using memory bandwidth not currently committed to a primary compute task such that the analytic function is performed on the dataset being resident in one of the memory devices in the pool of memory devices using unused memory bandwidth otherwise allocated to the primary compute task associated with the dataset resident in the one of the memory devices to extract information to aid in processing the resident dataset, wherein performing the analytic function comprises connecting one of the processor devices, not previously assigned to the one of the memory devices, to the one of the memory devices in real-time to opportunistically perform an analysis on the dataset which otherwise would not have been performed during a course of performing a workload corresponding to the dataset, and wherein the dataset is selected with which to perform the analysis based on a percentage of the dataset most represented in the one of the memory devices as opposed to a percentage of the dataset residing in secondary storage; and

in conjunction with using the iterative learning algorithm, monitors an initial data load, for a predetermined amount of time or until a predetermined quantity of data has been monitored, and ongoing data access patterns of the dataset to build a continually updated data boundary map for performing the analytic function, wherein the continually updated data boundary map is inclusive of an identifier and associated memory location for each segment of the data of the dataset.

8. The system of claim 7 , wherein the at least one processor device receives user input for designating certain processor devices of the pool of processor devices to be used to perform computation of the analytic function.

9. The system of claim 8 , wherein the at least one processor device uses the one of the processor devices selected from designated processor devices of the pool of processor devices to perform computation of the analytic function when the designated processor devices are determined to be idle.

10. The system of claim 7 , wherein the at least one processor device performs at least one of:
providing a training phase time threshold (TPTT) defining the predetermined amount of time the ongoing data access patterns are to be observed for building an initial data boundary map, the initial data boundary map iteratively updated to become the continually updated data boundary map;
providing a training phase size threshold (TPST) defining the predetermined quantity of data to be mapped in the initial data boundary map; and
upon not providing the TPTT or the TPST, observing and comparing the ongoing data access patterns to access patterns of previous workloads.

11. The system of claim 10 , wherein the iterative learning algorithm includes accounting for at least one of movement of data blocks of the dataset between a secondary storage and the pool of memory devices, new data block creation, and data block deletion.

12. The system of claim 11 , wherein the at least one processor device uses the continually updated data boundary map to track and target coverage of the analytic function of the dataset in real-time.

13. A computer program product for optimizing memory bandwidth in a disaggregated computing system by at least one processor device, the computer program product embodied on a non-transitory computer-readable storage medium having computer-readable program code portions stored therein, the computer-readable program code portions comprising:
an executable portion that assigns respective memory devices to respective processor devices in the disaggregated computing system, th

Assignees

• IBM

Inventors

• Bivens John A
• Li Min
• Mahindru Ruchi
• Ramasamy Harigovind V
• Ruan Yaoping
• Salapura Valentina
• Schenfeld Eugen

Classifications

• G06F9/5016 Primary

  the resource being the memory · CPC title

• G06F3/0631

  by allocating resources to storage systems · CPC title

• G06F11/3037

  where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00) · CPC title

• G06F3/067 Primary

  Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title