Host system configured to manage assignment of free block, data processing system including the host system, and method of operating the host system

US11275516B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11275516-B2
Application numberUS-202016857953-A
CountryUS
Kind codeB2
Filing dateApr 24, 2020
Priority dateOct 2, 2019
Publication dateMar 15, 2022
Grant dateMar 15, 2022

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A host system configured to communicate with a storage system, including a host flash translation layer (FTL) configured to manage a plurality of blocks included in the storage system, wherein the host FTL includes a block assignment module configured to generate priority information indicating priorities of free blocks from among the plurality of blocks based on erase count values of the free blocks, and wherein the host FTL is configured to assign a free block having a lowest erase count value, from among the free blocks, for a data write operation based on the priority information; a counting circuit configured to count a number of erase operations performed on each of the plurality of blocks; and an interface circuit configured to transmit to the storage system a block address along with an access request to the storage system, the block address indicating a position of the assigned free block.

First claim

Opening claim text (preview).

What is claimed is: 1. A host system configured to communicate with a storage system, the host system comprising: a host flash translation layer (FTL) configured to: manage a plurality of blocks included in the storage system, generate priority information indicating priorities of free blocks from among the plurality of blocks based on index count values associated with erase count values of the free blocks, and assign a free block having a lowest index count value, from among the free blocks, for a data write operation based on the priority information; a counting circuit configured to count a number of erase operations performed respectively on each of the plurality of blocks, and to increment an index count value of the index count values based on a corresponding erase count value of the erase count values reaching an integer multiple of a predetermined set value, wherein the predetermined set value is greater than 1 erase count; and an interface circuit configured to transmit to the storage system a block address along with an access request to the storage system, the block address indicating a position of the assigned free block. 2. The host system of claim 1 , wherein the interface circuit is further configured to receive block information about the plurality of blocks from the storage system, and wherein the counting circuit is further configured to generate the index count values. 3. The host system of claim 1 , wherein the block address includes physical address information indicating the assigned free block. 4. The host system of claim 1 , wherein the host FTL is further configured to: determine the free blocks, from among the plurality of blocks; increase an erase count value of a block, from among the plurality of blocks, on which an erase operation is performed; and set the priorities of the free blocks based on the index count values of the free blocks. 5. The host system of claim 1 , wherein the host FTL is further configured to manage a sorting data structure of the free blocks such that the free block having the lowest index count value is assigned for the data write operation, based on the index count values of the free blocks. 6. The host system of claim 5 , wherein the sorting data structure corresponds to a minimum heap-sorting data structure having a tree structure determined according to the index count values. 7. The host system of claim 5 , wherein a first block of the plurality of blocks is included in the free blocks based on a request for the storage system to perform an erase operation on the first block, and wherein the host FTL is further configured to update the sorting data structure based on a first index count value of the first block. 8. The host system of claim 7 , wherein, a second block is included in the sorting data structure prior to the first block, and wherein based on a second index count value of the second block being higher than the first index count value, the host FTL is further configured to assign the first block for the data write operation prior to the second block. 9. The host system of claim 1 , wherein the host system is configured to periodically store the erase count values of the free blocks, and to receive the erase count values of the free blocks from the storage system during an initialization operation. 10. The host system of claim 1 , wherein the host system is configured to manage a plurality of flash memory devices included in the storage system, wherein the host FTL is further configured to separately manage the priority information for each flash memory device of the plurality of flash memory devices. 11. The method of claim 1 , wherein the predetermined set value comprises 10 erase counts. 12. The method of claim 1 , further comprising sorting the priority information based on the incremented index count value. 13. A method of operating a host system configured to communicate with a storage system comprising a plurality of blocks, the method comprising: counting a number of erase operations performed respectively on each of the plurality of blocks; generating a sorting data structure based on index count values associated with erase count values of a first free block to a (N−1)th free block of the plurality of blocks, wherein N is an integer greater than or equal to 2; incrementing an index count value of the index count values based on a corresponding erase count value of the erase count values reaching an integer multiple of a predetermined set value, wherein the predetermined set value is greater than 1 erase count; generating an N-th free block by controlling the storage system to perform an erase operation on a block of the plurality of blocks; updating the sorting data structure based on an index count value of the N-th free block; and assigning a free block having a lowest index count value, from among the first to N-th free blocks, for a data write operation according to the updated sorting data structure. 14. The method of claim 13 , wherein the host system comprises a host flash translation layer (FTL) and is configured to manage the storage system, and wherein the storage system comprises an open-channel solid-state drive (SSD). 15. The method of claim 13 , further comprising: transmitting a request for storing the erase count values of the first free block to the (N−1)th free block; and receiving information comprising the erase count values of the first free block to the (N−1)th free block from the storage system during an initialization process between the storage system and the host system. 16. The method of claim 13 , wherein the first free block is included in the sorting data structure prior to the N-th free block, and wherein, based on the index count value of the N-th free block being lower than an index count value of the first free block, the N-th free block is assigned for the data write operation prior to the first free block. 17. The method of claim 13 , wherein the sorting data structure corresponds to a minimum heap-sorting data structure having a tree structure based on the index count values. 18. A data processing system comprising a storage system, wherein the storage system comprises: a storage device comprising at least one flash memory device, wherein each flash memory device of the at least one flash memory device comprises a plurality of blocks; and a controller comprising a first interface circuit configured to receive from an external device an access request for the plurality of blocks and an erase request for the plurality of blocks, the controller being configured to control an access operation on one or more of the plurality of blocks based on the access request, and an erase operation on the one or more of the plurality of blocks based on the erase request, wherein, based on a first block from among the plurality of blocks being erased prior to a second block from among the plurality of blocks being erased in response to the erase request, the first block is changed into a first free block prior to the second block being changed into a second free block, and wherein based on an index count value of the first free block being higher than an index count value of the second free block, the second free block is assigned for a data write operation prior to the first free block, wherein at least one of the index count value of the first free block and the index count value of the second free block is incremented based on at least one of an erase count value of the first free block or an erase count value of the second fr

Assignees

Inventors

Classifications

  • G06F3/0679Primary

    Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

  • in relation to data integrity, e.g. data losses, bit errors · CPC title

  • Wear leveling · CPC title

  • Cleaning, compaction, garbage collection, erase control · CPC title

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What does patent US11275516B2 cover?
A host system configured to communicate with a storage system, including a host flash translation layer (FTL) configured to manage a plurality of blocks included in the storage system, wherein the host FTL includes a block assignment module configured to generate priority information indicating priorities of free blocks from among the plurality of blocks based on erase count values of the free …
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/0679. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 15 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).