Conductive PVD stack-up design to improve reliability of deposited electrodes

Patent metadata

Field	Value
Publication number	US-11272631-B2
Application number	US-201916564655-A
Country	US
Kind code	B2
Filing date	Sep 9, 2019
Priority date	Sep 9, 2019
Publication date	Mar 8, 2022
Grant date	Mar 8, 2022

Abstract

An electronic device can include a housing component that can define an interior surface and an exterior surface of the device, a metallic film deposited on the interior surface and extending at least partially onto the exterior surface, and a ceramic film deposited on the exterior surface and at least partially over a portion of the metallic film on the exterior surface. The ceramic film can be in electrical communication with a portion of the metallic film deposited on the interior surface to form an electrical pathway from the exterior surface to the interior surface.

First claim

What is claimed is:

1. An electronic device, comprising:
a housing component defining an interior surface and an exterior surface of the electronic device;
a metallic film deposited on the interior surface and extending at least partially around an edge of the housing component onto the exterior surface; and
a ceramic film deposited on the exterior surface and at least partially over a portion of the metallic film on the exterior surface, the ceramic film in electrical communication with a portion of the metallic film deposited on the interior surface.

2. The electronic device of claim 1 , further comprising:
a seal isolating an internal volume of the electronic device from an ambient environment, the internal volume at least partially defined by the interior surface; and
an electronic component disposed in the internal volume and electrically coupled to the ceramic film, wherein the exterior surface is exposed to the ambient environment.

3. The electronic device of claim 1 , wherein the metallic film comprises at least one of chromium or titanium.

4. The electronic device of claim 1 , wherein the ceramic film comprises a nitride material.

5. The electronic device of claim 1 , wherein:
the interior surface has a concave geometry; and
the exterior surface has a convex geometry.

6. The electronic device of claim 1 , wherein the housing component is transparent.

7. A housing for an electronic device, comprising:
a conductive film deposited on a first surface of the housing and extending around a peripheral edge of the housing at least partially onto a second surface of the housing opposite the first surface;
a ceramic film deposited on the second surface and at least partially over a portion of the conductive film deposited on the second surface; and
the conductive film and the ceramic film forming an electrically conductive pathway extending from the first surface to the second surface.

8. The housing of claim 7 , further comprising a conductive ink in electrical contact with a portion of the conductive film on the first surface.

9. The housing of claim 7 , wherein at least one of the ceramic film or the conductive film is deposited by a physical vapor deposition process.

10. The housing of claim 7 , wherein the conductive film comprises:
a first conductive layer deposited on the first surface; and
a second conductive layer deposited on the second surface and at least partially over the first conductive layer.

11. The housing of claim 10 , wherein:
the first conductive layer is formed prior to the second conductive layer; and
the ceramic film is formed subsequent to the first conductive layer and the second conductive layer.

12. The housing of claim 10 , wherein:
the first conductive layer has a thickness of about 100 nanometers; and
the second conductive layer has a thickness of about 50 nanometers.

13. The housing of claim 7 , wherein the ceramic film has a thickness of 1 micron.

14. The housing of claim 7 , wherein the conductive film comprises at least one of chromium or titanium.

15. The housing of claim 14 , wherein the ceramic film comprises a nitride including at least one of chromium or titanium.

16. The housing of claim 7 , wherein the first surface comprises a non-planar surface.

17. The housing of claim 7 , wherein the ceramic film has an L* value of 55 to 65 in a CIELAB color space.

18. A method of forming a housing component, comprising:
depositing a first conductive layer on a first surface of the housing component;
depositing a second conductive layer on a second surface of the housing component opposite the first surface, the second conductive layer at least partially overlapping the first conductive layer at a peripheral edge of the housing; and
depositing a ceramic layer over the second conductive layer.

19. The method of claim 18 , wherein the second conductive layer comprises at least one of chromium or titanium and the ceramic layer comprises a nitride material including at least one of chromium or titanium.

20. The method of claim 18 , wherein the housing component is a first housing component, the method further comprising sealing an interface between the first housing component and a second housing component.

Assignees

• Apple Inc

Inventors

• Liang Jiahui
• Das Anirban
• Kim Jungyup
• Melcher Martin
• Varadharajan Srinivasan
• Oetting Wolf

Classifications

• G04B39/02

  Sealing crystals or glasses {(sealing the case and the winding stem G04B37/08)} · CPC title

• H05K5/069 Primary

  Other details of the casing, e.g. wall structure, passage for a connector, a cable, a shaft · CPC title

• G04G21/00

  Input or output devices integrated in time-pieces · CPC title

• C23C28/322 Primary

  only coatings of metal elements only · CPC title

• C23C14/042

  using masks · CPC title