Power amplifying circuit
US-2020169232-A1 · May 28, 2020 · US
US11271599B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11271599-B2 |
| Application number | US-202017125252-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 17, 2020 |
| Priority date | Dec 19, 2019 |
| Publication date | Mar 8, 2022 |
| Grant date | Mar 8, 2022 |
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An envelope tracking system includes an envelope signal generator, a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode, a capacitor having a first and second terminal, the first terminal coupled to ground, a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node, and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor such that a voltage across the capacitor changes from a first voltage to a second voltage.
Opening claim text (preview).
What is claimed is: 1. An envelope tracking system, comprising: an envelope signal generator; a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode; a capacitor having a first and second terminal, the first terminal coupled to ground; a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node; and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor in a way that a voltage across the capacitor changes from a first voltage to a second voltage. 2. The envelope tracking system of claim 1 , wherein the circuit further comprises N-type transistors and P-type transistors configured to allow bi-directional current flow. 3. The envelope tracking system of claim 1 , wherein the linear path is configured to be activated by a mobile industry processor interface (MIPI) trigger prior to a time at which the linear path provides the output voltage to the power amplifier. 4. The envelope tracking system of claim 1 , wherein the bi-directional current-limiting switch is configured to charge or discharge the capacitor based on a maximum and minimum current. 5. The envelope tracking system of claim 4 , wherein the bi-directional current-limiting switch is configured to charge or discharge the capacitor based on N-type transistors and P-type transistors in respective N-type control circuitry and P-type control circuitry. 6. The envelope tracking system of claim 5 , wherein the N-type control circuitry and P-type control circuitry further comprise amplification stages. 7. The envelope tracking system of claim 5 , wherein an output of the N-type control circuitry is combined with an output of the P-type control circuitry and provided to a bias function configured to provide a current limiting function to the bi-directional current-limiting switch. 8. A method for communication, comprising: providing a first voltage to a power amplifier using a switching regulator path; and when switching from the first voltage to a second voltage in a first mode, or when switching from the first mode to a second mode, using a linear path to provide the first voltage to the power amplifier while the switching regulator path is decoupled from an output node of an output capacitor while the output capacitor is charged to the second voltage through a circuit comprising a bi-directional switch. 9. The method of claim 8 , wherein the first mode comprises an average power tracking (APT) mode and the second mode comprises an envelope tracking (ET) mode. 10. The method of claim 8 , further comprising activating the linear path using a mobile industry processor interface (MIPI) trigger prior to a time at which the linear path provides the first voltage. 11. The method of claim 8 , further comprising providing a discontinuity free transition when switching from the first mode to the second mode. 12. The method of claim 8 , wherein the bi-directional switch provides a current-limiting function. 13. The method of claim 8 , further comprising charging or discharging the output capacitor based on a maximum and minimum current. 14. The method of claim 13 , further comprising determining the maximum and minimum current using N-type transistors and P-type transistors in respective N-type control circuitry and P-type control circuitry. 15. The method of claim 14 , wherein the N-type control circuitry and P-type control circuitry further comprise amplification stages. 16. The method of claim 14 , further comprising combining an output of the N-type control circuitry with an output of the P-type control circuitry to develop a bias signal configured to provide a current limiting function to the bi-directional switch. 17. An envelope tracking system, comprising: an envelope signal generator; a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage to the power amplifier when in an envelope tracking (ET) mode; circuitry configured to activate elements associated with the ET mode prior to a symbol boundary based at least in part on a mobile industry processor interface (MIPI) trigger; and a switch configured to disconnect an output node of an output capacitor that is charged to a first output voltage from the supply modulator while the output voltage is provided to the power amplifier in the ET mode. 18. The envelope tracking system of claim 17 , wherein the supply modulator provides a discontinuity-free voltage output transition from APT mode to ET mode. 19. A method for communication, comprising: providing a first voltage in a first mode to a power amplifier using a linear path; when switching from the first voltage to a second voltage in a second mode, using the linear path to provide the second voltage to the power amplifier while a switching regulator path is decoupled from an output node of an output capacitor and the switching regulator path charges the output capacitor to the second voltage; and when the output capacitor is charged to the second voltage, deactivating the linear path and coupling the switching regulator path to the output node of the output capacitor in a way that the switching regulator path provides the second voltage in the second mode while the output capacitor is charged to the second voltage through a charging circuit comprising a bi-directional switch. 20. The method of claim 19 , wherein the first mode comprises an envelope tracking (ET) mode and the second mode comprises an average power tracking (APT) mode. 21. The method of claim 19 , wherein the bi-directional switch provides a current-limiting function. 22. The method of claim 19 , further comprising activating the linear path using a mobile industry processor interface (MIPI) trigger prior to a time at which the linear path provides the first voltage. 23. The method of claim 19 , further comprising charging or discharging the output capacitor based on a maximum and minimum current. 24. The method of claim 23 , further comprising determining the maximum and minimum current using N-type transistors and P-type transistors in respective N-type control circuitry and P-type control circuitry. 25. The method of claim 24 , wherein the N-type control circuitry and P-type control circuitry further comprise amplification stages. 26. The method of claim 24 , further comprising combining an output of the N-type control circuitry with an output of the P-type control circuitry to develop a bias signal configured to provide a current limiting function to the bi-directional switch.
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