Using a sampling switch for multiple evaluation units

Patent metadata

Field	Value
Publication number	US-11265006-B2
Application number	US-201816058749-A
Country	US
Kind code	B2
Filing date	Aug 8, 2018
Priority date	Aug 8, 2018
Publication date	Mar 1, 2022
Grant date	Mar 1, 2022

Abstract

In some examples, an integrated circuit device includes a sampling switch configured to sample an input signal. The integrated circuit device also includes a first evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The integrated circuit device further includes a second evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The sampling switch is configured to deliver the sampled input signal to the first evaluation unit and deliver the sampled input signal to the second evaluation unit.

First claim

What is claimed is:

1. An integrated circuit device comprising:
a sampling switch configured to sample an input signal;
a first evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal; and

a second evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal,

wherein the sampling switch is configured to:
deliver the sampled input signal to the first evaluation unit; and
deliver the sampled input signal to the second evaluation unit, and

wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and
wherein the second voltage level is lower than the first voltage level.

2. The integrated circuit device of claim 1 , wherein an operating voltage range of the first evaluation unit is different from an operating voltage range of the second evaluation unit.

3. The integrated circuit device of claim 1 , wherein an evaluation scheme of the first evaluation unit is different from an evaluation scheme of the second evaluation unit.

4. The integrated circuit device of claim 1 , further comprising:
a signal distribution unit; and
a control circuit configured to:
control the sampling switch to sample the input signal; and
control the signal distribution unit,

wherein the first evaluation unit is configured to receive the sampled input signal when the signal distribution unit electrically connects the sampling switch to the first evaluation unit, and
wherein the second evaluation unit is configured to receive the sampled input signal when the signal distribution unit electrically connects the sampling switch to the second evaluation unit.

5. The integrated circuit device of claim 4 , wherein the control circuit is further configured to control a timing of a sampling phase of the sampling switch in accordance with a timing requirement of one or more of the first evaluation unit or the second evaluation unit.

6. The integrated circuit device of claim 4 , wherein the control circuit is further configured to:
control a timing of an evaluation phase of the first evaluation unit; and
control a timing of an evaluation phase of the second evaluation unit.

7. The integrated device of claim 6 , wherein the timing of the evaluation phase of the first evaluation unit is different from the timing of the evaluation phase of the second evaluation unit.

8. The integrated device of claim 7 , wherein the evaluation phase of the first evaluation unit does not overlap with the evaluation phase of the second evaluation unit in terms of timing.

9. The integrated circuit device of claim 4 , wherein the signal distribution unit comprises:
a first distribution switch configured to electrically connect the sampling switch to the first evaluation unit when the first distribution switch is active; and
a second distribution switch configured to electrically connect the sampling switch to the second evaluation unit when the second distribution switch is active.

10. The integrated circuit device of claim 1 , further comprising a sampling unit configured to:
receive the sampled input signal; and
deliver the sampled input signal to one or more of the first evaluation unit or the second evaluation unit.

11. The integrated circuit device of claim 10 , further comprising a control circuit configured to control a timing of a sampling phase of the sampling switch in accordance with a timing requirement of the sampling unit.

12. The integrated circuit device of claim 1 , further comprising a voltage divider circuit configured to:
receive the sampled input signal at the first voltage level from the sampling switch; and
deliver a divided signal at the second voltage level to the at least one of the first evaluation circuit or the second evaluation unit based on the sampled input signal.

13. The integrated circuit device of claim 1 , wherein the sampling switch is configured to:
be coupled to a first electrical component; and
sample a voltage difference between a first terminal and a second terminal of the electrical component,
wherein one or more of the first evaluation unit or the second evaluation unit is configured to receive the sampled voltage difference.

14. A method comprising:
controlling a first evaluation unit of an integrated circuit device to receive a sampled input signal from a sampling switch of the integrated circuit device and evaluate the sampled input signal;
controlling a second evaluation unit of the integrated circuit device to receive the sampled input signal from the sampling switch and evaluate the sampled input signal; and
controlling the sampling switch, wherein controlling the sampling switch comprises:
sampling the input signal;
delivering the sampled input signal to the first evaluation unit; and
delivering the sampled input signal to the second evaluation unit,

wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and
wherein the second voltage level is lower than the first voltage level.

15. The method of claim 14 , wherein controlling the sampling switch further comprises controlling a timing of a sampling phase of the sampling switch in accordance with a timing requirement of one or more of the first evaluation unit or the second evaluation unit.

16. The method of claim 14 , further comprising:
controlling a timing of an evaluation phase of the first evaluation unit; and
controlling a timing of an evaluation phase of the second evaluation unit.

17. The method of claim 14 , further comprising:
controlling a sampling unit to receive the sampled input signal; and
controlling the sampling unit to deliver the sampled input signal to one or more of the first evaluation unit or the second evaluation unit.

18. A device comprising:
a sampling switch configured to sample an input signal;
a first evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal; and

a second evaluation unit configured to:
receive the sampled input signal from the sampling switch; and
evaluate the sampled input signal,

wherein the first evaluation unit and the second evaluation unit are configured to share the sampling switch,
wherein an operating voltage range of the sampling switch is greater than an operating voltage range of at least one of the first evaluation unit or the second evaluation unit such that the sampling switch is configured to receive the input signal at a first voltage level and the at least one of the first evaluation unit or the second evaluation unit is configured to receive the sampled input signal at a second voltage level, and
wherein the second voltage level is lower than the first voltage level.

19. The device of claim 18 , wherein the samp

Assignees

• Infineon Technologies Ag

Inventors

• Barrenscheen Jens
• Bogner Peter
• Wappis Herwig

Classifications

• H03M1/1295

  Clamping, i.e. adjusting the DC level of the input signal to a predetermined value · CPC title

• H03M1/1245 Primary

  Details of sampling arrangements or methods · CPC title

• H03M1/121

  Interleaved, i.e. using multiple converters or converter parts for one channel · CPC title

• H03M1/002

  Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed · CPC title