Microelectronic assemblies comprising a package substrate portion integrated with a substrate integrated waveguide filter

Patent metadata

Field	Value
Publication number	US-11264687-B2
Application number	US-201815972441-A
Country	US
Kind code	B2
Filing date	May 7, 2018
Priority date	Apr 3, 2018
Publication date	Mar 1, 2022
Grant date	Mar 1, 2022

Abstract

Microelectronic assemblies that include a lithographically-defined substrate integrated waveguide (SIW) component, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate portion having a first face and an opposing second face; and an SIW component that may include a first conductive layer on the first face of the package substrate portion, a dielectric layer on the first conductive layer, a second conductive layer on the dielectric layer, and a first conductive sidewall and an opposing second conductive sidewall in the dielectric layer, wherein the first and second conductive sidewalls are continuous structures.

First claim

The invention claimed is:

1. A microelectronic assembly, comprising:
a package substrate portion having a first surface and an opposing second surface, the package substrate portion including conductive lines and vias through a dielectric material; and
a substrate integrated waveguide (SIW) filter overlaying the package substrate portion at the second surface, the SIW filter comprising:
a first conductive layer on the second surface of the package substrate portion;
a dielectric layer on the first conductive layer;
a second conductive layer on the dielectric layer;
a first conductive sidewall and an opposing second conductive sidewall in the dielectric layer, wherein the first and second conductive sidewalls are continuous structures, and wherein the first and second conductive sidewalls are connected to the first conductive layer at a bottom side and connected to the second conductive layer at a top side; and
a plurality of resonator cavities in the dielectric layer between the first and second conductive sidewalls.

2. The microelectronic assembly of claim 1 , wherein the plurality of resonator cavities is formed by a plurality of vertical conductive posts in the dielectric layer between the first and second conductive sidewalls.

3. The microelectronic assembly of claim 2 , wherein at least one of the plurality of vertical conductive posts has a cross-section that is circular.

4. The microelectronic assembly of claim 2 , wherein at least one of the plurality of vertical conductive posts has a cross-section that is non-circular.

5. The microelectronic assembly of claim 1 , wherein the plurality of resonator cavities is formed by a plurality of ridges in the dielectric layer between the first and second conductive sidewalls.

6. The microelectronic assembly of claim 5 , wherein the plurality of resonator cavities is arranged in a series of coupled resonator cavities, and wherein the coupled resonator cavities are coupled by irises.

7. The microelectronic assembly of claim 1 , wherein the dielectric layer is a first dielectric layer, further comprising a second dielectric layer on the first dielectric layer, wherein the first and second conductive sidewalls are continuous structures in the first and second dielectric layers.

8. The microelectronic assembly of claim 1 , wherein the first and second conductive sidewalls are cuboidal with planar vertical sides.

9. The microelectronic assembly of claim 1 , further comprising:
an input port at a first end of the first and second conductive layers to receive an electromagnetic signal;
an input feed coupled to the input port;
an output port at a second end of the first and second conductive layers to transmit the electromagnetic signal; and
an output feed coupled to the output port.

10. The microelectronic assembly of claim 9 , wherein the input feed includes a microstrip-to-SIW transition, a microstrip-to-slot transition, a stripline-to-SIW transition, a waveguide launcher structure, a radio frequency (RF) connector, or an electromagnetic radiating structure.

11. The microelectronic assembly of claim 9 , wherein the electromagnetic signal has a frequency equal to or greater than 100 GHz.

12. The microelectronic assembly of claim 1 , wherein the SIW filter is a first SIW filter, further comprising:
a second SIW filter overlaying the package substrate portion at the second surface, the second SIW filter comprising:
a first conductive layer on the second surface of the package substrate portion;
a dielectric layer on the first conductive layer;
a second conductive layer on the dielectric layer;
a first conductive sidewall and an opposing second conductive sidewall in the dielectric layer, wherein the first and second conductive sidewalls are continuous structures, and wherein the first and second conductive sidewalls are connected to the first conductive layer at a bottom side and connected to the second conductive layer at a top side; and
a plurality of resonator cavities in the dielectric layer between the first and second conductive sidewalls.

13. The microelectronic assembly of claim 12 , wherein the first SIW filter and the second SIW filter are coupled via a slot or an iris in the second conductive layer of the first SIW filter and in the first conductive layer of the second SIW filter.

14. The microelectronic assembly of claim 1 , wherein the microelectronic assembly is included in a portable computing device.

15. A microelectronic assembly, comprising:
a package substrate portion having a first surface and an opposing second surface, the package substrate portion including conductive lines and vias through a dielectric material; and
a substrate integrated waveguide (SIW) component overlaying the package substrate portion at the second surface, the SIW component comprising:
a first conductive layer on the second surface of the package substrate portion;
a dielectric layer, on the first conductive layer, including a plurality of conductive sidewalls, wherein the plurality of conductive sidewalls are continuous structures in the dielectric layer; and
a second conductive layer on the dielectric layer, wherein the plurality of conductive sidewalls are connected to the first conductive layer at a bottom side and connected to the second conductive layer at a top side.

16. The microelectronic assembly of claim 15 , further comprising:
a plurality of conductive structures in the dielectric layer between the plurality of conductive sidewalls to divide an electromagnetic signal into one or more frequency bands.

17. The microelectronic assembly of claim 16 , wherein the plurality of conductive structures includes a vertical post, a ridge, or a vertical fin.

18. The microelectronic assembly of claim 15 , wherein the plurality of conductive sidewalls forms an input port to receive an electromagnetic signal, and a first output port and a second output port to transmit the electromagnetic signal, further comprising:
an input feed coupled to the input port;
a first output feed coupled to the first output port; and
a second output feed coupled to the second output port.

19. The microelectronic assembly of claim 18 , wherein the input feed includes a microstrip-to-SIW transition, a microstrip-to-slot transition, a stripline-to-SIW transition, a waveguide launcher structure, a radio frequency (RF) connector, or an electromagnetic radiating structure.

20. The microelectronic assembly of claim 18 , wherein the first or the second output feed includes a microstrip-to-SIW transition, a microstrip-to-slot transition, a stripline-to-SIW transition, a waveguide launcher structure, a radio frequency (RF) connector, or an electromagnetic radiating structure.

21. The microelectronic assembly of claim 18 , wherein the electromagnetic signal has a frequency equal to or greater than 100 GHz.

22. A method of manufacturing a microelectronic assembly having a SIW component, comprising:
forming a package substrate portion including conductive lines and vias through a dielectric material, wherein the package substrate portion has a first surface and an opposing second surface;
forming a first conductive layer on the second surface of the package substrate portion;
forming a first dielectric layer on the first conductive layer;
forming a first conductive sidewall and an opposing second conductive sidewall on the first conductive layer, wherein the first and second conductive sidewalls are continuous structures;
forming a second

Assignees

• Intel Corp

Inventors

• Dogiamis Georgios
• Elsherbini Adel A

Classifications

• H01P5/12

  Coupling devices having more than two ports (H01P5/04 takes precedence) · CPC title

• H01P1/2138

  using hollow waveguide filters (H01P1/2131 takes precedence) · CPC title

• H01P1/2088 Primary

  Integrated in a substrate · CPC title

• H01P11/002

  Manufacturing hollow waveguides · CPC title

• H01P5/20

  Magic-T junctions · CPC title