Multi-wavelength VCSEL array to reduce speckle
US-9065254-B2 · Jun 23, 2015 · US
US11264527B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11264527-B2 |
| Application number | US-201816148702-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 1, 2018 |
| Priority date | Oct 1, 2018 |
| Publication date | Mar 1, 2022 |
| Grant date | Mar 1, 2022 |
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Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The integrated circuit package includes first and second active dies. Each of the first and second active dies includes a top contact disposed on the top surface of the die and a bottom contact disposed on a bottom surface of the die. The package further includes a via die having first and second vias that each extends between a top contact disposed on a top surface of the via die and a bottom contact disposed on a bottom surface of the via die, where the bottom contact of the first active die is electrically connected to the bottom contact of the first via of the via die and the bottom contact of the second active die is electrically connected to the bottom contact of the second via of the via die.
Opening claim text (preview).
What is claimed is: 1. A hermetically-sealed system comprising: an integrated circuit package comprising: first and second active dies, wherein the first active die is adapted to emit electromagnetic radiation from a top surface that comprises a first wavelength and the second active die is adapted to emit electromagnetic radiation from a top surface that comprises a second wavelength different from the first wavelength, wherein each of the first and second active dies comprises a top contact disposed on the top surface of each of the first and second active dies and a bottom contact disposed on a bottom surface of each of the first and second active dies; and a via die comprising first and second vias that each extends between a top contact disposed on a top surface of the via die and a bottom contact disposed on a bottom surface of the via die, wherein the bottom contact of the first active die is electrically connected to the bottom contact of the first via of the via die and the bottom contact of the second active die is electrically connected to the bottom contact of the second via of the via die; a housing comprising an inner surface and an outer surface; and a dielectric substrate hermetically sealed to the housing, wherein the substrate comprises a first major surface and a second major surface; wherein the integrated circuit package is disposed inside the housing and on the first major surface of the substrate such that at least a portion of the electromagnetic radiation emitted by each of the first and second active dies is transmitted through the first and second major surfaces of the substrate. 2. The system of claim 1 , further comprising a detector disposed on the first major surface of the substrate and adapted to detect at least a portion of the electromagnetic radiation transmitted through the first and second major surfaces of the substrate by the first and second active dies of the integrated circuit package. 3. The system of claim 1 , wherein the substrate is substantially transmissive to light having a wavelength of at least 200 nm and no greater than 10,000 nm. 4. The system of claim 1 , further comprising a patterned conductive layer disposed on the first major surface of the substrate, wherein the first and second active dies and the via die of the integrated circuit package are electrically connected to the patterned conductive layer. 5. The system of claim 1 , further comprising a second detector disposed on the first major surface of the substrate, wherein the detector is adapted to detect electromagnetic radiation emitted by the first active die and the second detector is adapted to detect electromagnetic radiation emitted by the second active die. 6. The system of claim 4 , wherein the integrated circuit package further comprises solder bumps disposed on the top contact of each of the first and second active dies and the via die, wherein the solder bumps are electrically connected to the first and second active dies, the via die and the patterned conductive layer. 7. The system of claim 1 , wherein the integrated circuit package further comprises third, fourth, and fifth active dies, wherein the third active die is adapted to emit electromagnetic radiation from a top surface that comprises a third wavelength, the fourth active die is adapted to emit electromagnetic radiation from a top surface that comprises a fourth wavelength, and the fifth active die is adapted to emit electromagnetic radiation from a top surface of the fifth active die that comprises a fifth wavelength; wherein the bottom contact of each of the third, fourth, and fifth active dies is electrically connected to bottom contacts of third, fourth, and fifth vias respectively of the via die. 8. The system of claim 1 , wherein the first and second active dies and the via die are disposed in a molded encapsulant. 9. The system of claim 8 , wherein the integrated circuit package further comprises a patterned conductive layer disposed on the bottom surfaces of the first and second active dies and the via die, wherein the patterned conductive layer electrically connects the bottom contact of the first active die to the bottom contact of the first via of the via die and the bottom contact of the second active die to the bottom contact of the second via of the via die. 10. The system of claim 8 , wherein the encapsulant is disposed between the first and second active dies and the via die. 11. The system of claim 1 , wherein each of the first and second active dies of the integrated circuit package comprises an aperture disposed on the top surface of the die, wherein the electromagnetic radiation emitted by each of the first and second active dies is directed through the respective aperture. 12. The system of claim 1 , further comprising a power source disposed at least partially within the housing and electrically connected to the integrated circuit package. 13. The system of claim 1 , further comprising a controller disposed within the housing and electrically connected to the integrated circuit package. 14. The system of claim 2 , wherein the detector is adapted to detect visible light having a wavelength of at least 350 nm and no greater than 850 nm. 15. The system of claim 1 , wherein the substrate is hermetically sealed to the housing by a laser bond. 16. The system of claim 1 , wherein at least one of the first and second active dies comprises a light emitting diode. 17. The system of claim 1 , wherein at least one of the first and second active dies comprises a vertical-cavity surface-emitting laser. 18. The system of claim 1 , further comprising one or more electronic devices disposed on the first major surface of the dielectric substrate, wherein the integrated circuit package is electrically connected to the one or more electronic devices. 19. The system of claim 18 , further comprising a conductor disposed on the first major surface of the substrate, wherein the conductor electrically connects the integrated circuit package to the one or more electronic devices. 20. The system of claim 2 , wherein the detector comprises a detecting surface that is disposed on the first major surface of the dielectric substrate using an optical coupling layer.
Package configurations · CPC title
of interconnections · CPC title
of encapsulations · CPC title
of packages · CPC title
Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title
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