Integrated piezoelectric microelectromechanical ultrasound transducer (PMUT) on integrated circuit (IC) for fingerprint sensing

US11263424B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11263424-B2
Application numberUS-202016805555-A
CountryUS
Kind codeB2
Filing dateFeb 28, 2020
Priority dateNov 28, 2012
Publication dateMar 1, 2022
Grant dateMar 1, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.

First claim

Opening claim text (preview).

What is claimed is: 1. A microelectromechanical systems (MEMS) device, comprising: a MEMS ultrasound transducer (MUT) structure and a piezoelectric material comprising scandium disposed within the MEMS device comprising a piezoelectric MUT (PMUT) array of a fingerprint sensor adapted to sense a characteristic of a fingerprint placed adjacent to the MUT structure; a first metal conductive layer disposed on the piezoelectric material; and a plurality of metal electrodes configured to form electrical connections between the first metal conductive layer, the piezoelectric material, and a complementary metal oxide semiconductor (CMOS) structure, wherein the pMUT structure and the CMOS structure are vertically stacked, wherein the PMUT array comprises the MUT structure in an array of MUT structures, and wherein the MUT structure and the array of MUT structures comprise a first two of the array of MUT structures in the rhombus configuration and a second two of the array of MUT structures in the hexagonal configuration arranged as a unit cell. 2. The MEMS device of claim 1 , further comprising: a second metal conductive layer disposed on the piezoelectric material and opposite the first metal conductive layer. 3. The MEMS device of claim 1 , further comprising: a stand-off formed on the piezoelectric material. 4. The MEMS device of claim 3 , wherein the stand-off comprises a silicon dioxide layer deposited over the piezoelectric material. 5. The MEMS device of claim 3 , wherein the MUT structure is bonded to the CMOS structure at the standoff via at least one of a eutectic bonding layer, a compression bond, or a conductive epoxy. 6. The MEMS device of claim 5 , wherein the eutectic bonding layer comprises an aluminum-germanium eutectic bonding layer. 7. The MEMS device of claim 5 , wherein the MUT structure is electrically coupled to the CMOS structure at the standoff. 8. The MEMS device of claim 1 , wherein the piezoelectric material comprises scandium doped aluminum nitride. 9. The MEMS device of claim 1 , further comprising: a piezoelectric layer comprising an aluminum nitride (AlN) seed layer, a bottom metal layer, and an aluminum nitride (AlN) layer.

Assignees

Inventors

Classifications

  • Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure · CPC title

  • Bimorph and unimorph actuators, e.g. piezo and thermo · CPC title

  • Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias · CPC title

  • the micromechanical device and the control or processing electronics being separate parts in the same package · CPC title

  • Interconnections between the MEMS and external electrical signals · CPC title

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Frequently asked questions

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What does patent US11263424B2 cover?
Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.
Who is the assignee on this patent?
Invensense Inc
What technology area does this patent fall under?
Primary CPC classification B81C1/00238. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).