Opto-electronic modulator utilizing one or more heating elements
US-10571723-B2 · Feb 25, 2020 · US
US11262603B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11262603-B2 |
| Application number | US-202016900714-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 12, 2020 |
| Priority date | Jun 13, 2019 |
| Publication date | Mar 1, 2022 |
| Grant date | Mar 1, 2022 |
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A silicon photonic integrated circuit with a heater. In some embodiments, the silicon photonic integrated circuit includes a first waveguide, on a top surface of the silicon integrated circuit, and a heater element, on the first waveguide. The heater element may include a first metal layer, on the first waveguide, and a second metal layer, on the first metal layer, the second metal layer having a different composition than the first metal layer, the second layer having a thickness of less than 300 nm.
Opening claim text (preview).
What is claimed is: 1. A silicon photonic integrated circuit, comprising: a first waveguide, on a top surface of the silicon photonic integrated circuit; a heater element, on the first waveguide; a first contact pad at, and electrically connected to, a first end of the heater element, the first contact pad having an upper surface suitable for forming a wire bond in a region spaced apart from the first waveguide in a plan view; and a second contact pad at, and electrically connected to, a second end of the heater element, the heater element comprising: a first metal layer, on the first waveguide, and a second metal layer, on the first metal layer, the second metal layer having a different composition than the first metal layer, the second metal layer having a thickness of less than 300 nm. 2. The silicon photonic integrated circuit of claim 1 , wherein the first metal layer is a barrier layer. 3. The silicon photonic integrated circuit of claim 1 , wherein the second metal layer has a sheet resistance lower than that of the first metal layer by at least a factor of three. 4. The silicon photonic integrated circuit of claim 1 , wherein the conductivity of the second metal layer is greater than three times the conductivity of the first metal layer. 5. The silicon photonic integrated circuit of claim 1 , wherein the first metal layer is composed of titanium tungsten. 6. The silicon photonic integrated circuit of claim 1 , wherein the second metal layer is composed of gold. 7. The silicon photonic integrated circuit of claim 1 , wherein the second metal layer has a thickness less than 100 nm. 8. The silicon photonic integrated circuit of claim 1 , wherein the second metal layer has a thickness less than 50 nm. 9. The silicon photonic integrated circuit of claim 8 , wherein the second metal layer has a thickness less than 30 nm. 10. The silicon photonic integrated circuit of claim 1 , wherein the heater element further comprises a third metal layer on the second metal layer, the third metal layer having a different composition than the second metal layer. 11. The silicon photonic integrated circuit of claim 10 , wherein the third metal layer is composed of titanium tungsten. 12. The silicon photonic integrated circuit of claim 1 , wherein the first contact pad comprises: a first metal layer contiguous with the first metal layer of the heater element and a second metal layer contiguous with the second metal layer of the heater element. 13. The silicon photonic integrated circuit of claim 12 , wherein the first contact pad further comprises a third metal layer and a fourth metal layer. 14. The silicon photonic integrated circuit of claim 13 , wherein the heater element further comprises a third metal layer, contiguous with the third metal layer of the first contact pad. 15. The silicon photonic integrated circuit of claim 1 , further comprising: a thermal isolation trench configured to reduce the rate at which heat is conducted away from the first waveguide or the heater element, or a thermal isolation cavity configured to reduce the rate at which heat is conducted away from the first waveguide or the heater element, or an electrode cavity configured to reduce the rate at which heat is conducted away from the first waveguide or the heater element. 16. A system, comprising: the silicon photonic integrated circuit of claim 1 , and a drive circuit for driving a heating current through the heater element. 17. The system of claim 16 , further comprising: a temperature sensor, and a controller comprising the drive circuit, the controller being configured to adjust the heating current to: reduce the heating current when a temperature sensed by the temperature sensor is greater than a setpoint and increase the heating current when a temperature sensed by the temperature sensor is less than the setpoint.
based on thermo-optic effects (G02F1/132 takes precedence) · CPC title
in optical waveguides, not otherwise provided for in this subclass · CPC title
Geodesic lenses or integrated gratings · CPC title
using thermal effects, e.g. heating or cooling of a temperature sensitive mounting body (optical modulation using thermo-optic effect G02F1/0147) · CPC title
Diffractive elements of the tunable type (G02B6/02195 takes precedence; optical modulation devices based on a change of the optical properties of the medium G02F1/00) · CPC title
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