Method and apparatus for implementing a super sample rate oversampling channelizer

US11258431B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11258431-B2
Application numberUS-201816104064-A
CountryUS
Kind codeB2
Filing dateAug 16, 2018
Priority dateAug 16, 2018
Publication dateFeb 22, 2022
Grant dateFeb 22, 2022

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Abstract

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An oversampling channelizer for processing overlapping data that includes a data storage unit, coupled to a data line that receives data values. The data storage unit includes a plurality of lanes, wherein each of the plurality of lanes includes dedicated memory locations and wires that store and transmit data values for a data vector of a data frame, and that store and transmit additional data values for a subsequent data vector of a subsequent data frame that includes a plurality of the data values from the data vector in the data frame. The oversampling channelizer includes a coefficient storage unit that stores a plurality of coefficient vectors for a plurality of coefficient frames. The oversampling channelizer includes a computation unit that computes a dot product of the data values for the data vectors of the data frame with coefficient values for coefficient vectors of a coefficient frame selected by a coefficient storage unit.

First claim

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What is claimed is: 1. An oversampling channelizer for processing overlapping data, comprising: a data storage unit, coupled to a data line that receives data values, that includes a plurality of lanes, wherein each of the plurality of lanes includes dedicated memory locations and wires that store and transmit data values for a data vector of a data frame, and that store and transmit additional data values for a subsequent data vector of a subsequent data frame that includes a plurality of the data values from the data vector in the data frame; a coefficient storage unit that stores a plurality of coefficient vectors for a plurality of coefficient frames; and a computation unit that computes a dot product of the data values for the data vectors of the data frame with coefficient values for coefficient vectors of a coefficient frame selected by a coefficient storage management unit. 2. The apparatus of claim 1 , wherein the computation unit further computes a dot product of the additional data values for the subsequent data vectors of the subsequent data frame with additional coefficient values for coefficient vectors of a subsequent coefficient frame selected by the coefficient storage unit. 3. The apparatus of claim 1 , wherein a number of data vectors in each data frame minus a decimation for each data frame is less than a number of the plurality of lanes in the data storage unit. 4. The apparatus of claim 1 , wherein each of the plurality of coefficient frames includes a unique order arrangement of coefficient vectors. 5. The apparatus of claim 1 , further comprising a coefficient storage management unit that selects the coefficient frame to reflect a rotation of coefficient vectors. 6. The apparatus of claim 1 further comprising a data storage management unit that selects whether to generate the subsequent data vector by adding a new data value and removing an oldest data value in the data vector or by reusing all of the data values from the data vector. 7. The apparatus of claim 1 further comprising a results adjustment unit that rotates the dot product generated by the computation unit to generate an adjusted dot product. 8. The apparatus of claim 7 further comprising a fast Fourier transform (FFT) unit that performs a FFT procedure on the adjusted dot product. 9. The apparatus of claim 1 , wherein the oversampling channelizer is implemented on a field programmable gate array. 10. An oversampling channelizer for processing overlapping data, comprising: a data storage unit, coupled to a data line that receives data values, that includes a plurality of lanes, wherein each of the plurality of lanes includes dedicated memory locations and wires that store and transmit data values for a data vector of a data frame, and that store and transmit additional data values for a subsequent data vector of a subsequent data frame that includes a plurality of the data values from the data vector in the data frame, wherein a number of data vectors in each data frame minus a decimation for each data frame is less than a number of the plurality of lanes in the data storage unit; a coefficient storage unit that stores a plurality of coefficient vectors for a plurality of coefficient frames, wherein each of the plurality of coefficient frames includes a unique order arrangement of coefficient vectors; and a computation unit that computes a dot product of the data values for the data vectors of the data frame with coefficient values for coefficient vectors of a coefficient frame selected by a coefficient storage management unit, wherein the oversampling channelizer is implemented on a field programmable gate array. 11. The apparatus of claim 10 , wherein the computation unit further computes a dot product of the additional data values for the subsequent data vectors of the subsequent data frame with additional coefficient values for coefficient vectors of a subsequent coefficient frame selected by the coefficient storage unit. 12. The apparatus of claim 10 , further comprising a coefficient storage management unit that selects the coefficient frame to reflect a rotation of coefficient vectors. 13. The apparatus of claim 10 further comprising a data storage management unit that selects whether to generate the subsequent data vector by adding a new data value and removing an oldest data value in the data vector or by reusing all of the data values from the data vector. 14. The apparatus of claim 10 further comprising a results adjustment unit that rotates the dot product generated by the computation unit to generate an adjusted dot product. 15. A method for managing overlapping data in an oversampling channelizer, comprising: generating a plurality of data vectors for a plurality of data frames with incoming data values, wherein data vectors that include data values from a data vector from a previous data frame are generated from a same lane that includes a dedicated memory and wires that store and transmit the data values from the data vector from the previous data frame; storing a plurality of coefficient vectors for a plurality of coefficient frames; selecting a coefficient frame from the plurality of coefficient frames to perform a dot product computation with a first data frame of the plurality of data frames; and computing a dot product of data values for data vectors of the first data frame with coefficient values for coefficient vectors of the selected coefficient frame. 16. The method of claim 15 further comprising: selecting a subsequent coefficient frame from the plurality of coefficient frames to perform a dot product computation with a second data frame of the plurality of data frames; computing a dot product of additional data values for additional data vectors of the second data frame with additional coefficient values for additional coefficient vectors of the selected subsequent coefficient frame. 17. The method of claim 15 , wherein a number of data vectors in each data frame minus a decimation for each data frame is less than a number of the plurality of lanes in the data storage unit. 18. The method of claim 15 , wherein each of the plurality of coefficient frames includes a unique order arrangement of coefficient vectors. 19. The method of claim 15 , wherein generating the plurality of data vectors for the plurality of data frames comprises selecting whether to generate a data vector by adding a new data value to and removing an oldest data value from a previous data vector or by reusing all of the data values from the previous data vector. 20. The method of claim 15 further comprising rotating the dot product of the data values for the data vectors of the first data frame with the coefficient values for the coefficient vectors of the selected coefficient frame.

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  • comprising non-recursive filters · CPC title

  • comprising non-recursive filters · CPC title

  • Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)} · CPC title

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What does patent US11258431B2 cover?
An oversampling channelizer for processing overlapping data that includes a data storage unit, coupled to a data line that receives data values. The data storage unit includes a plurality of lanes, wherein each of the plurality of lanes includes dedicated memory locations and wires that store and transmit data values for a data vector of a data frame, and that store and transmit additional data…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H03H17/0267. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 22 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).