Package apparatus

Patent metadata

Field	Value
Publication number	US-11246223-B2
Application number	US-201715651073-A
Country	US
Kind code	B2
Filing date	Jul 17, 2017
Priority date	Mar 28, 2014
Publication date	Feb 8, 2022
Grant date	Feb 8, 2022

Abstract

A package apparatus comprises a first wiring layer, a first dielectric material layer, a first conductive pillar layer, a first buffer layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface opposite to the first surface. The first dielectric material layer is disposed within partial zone of the first wiring layer. The first conductive pillar layer is disposed on the second surface of the first wiring layer. The first buffer layer is disposed within partial zone of the first conductive pillar layer. The second wiring layer is disposed on the first buffer layer and one end of the first conductive pillar layer. The protection layer is disposed on the first buffer layer and the second wiring layer.

First claim

What is claimed is:

1. A package apparatus, comprising:
a first wiring layer, having a first surface and a second surface, wherein the first surface and the second surface are disposed opposite to each other;
a first dielectric material layer, comprising one of a resin, a silicon nitride material, and a silicon oxide material, wherein the first wiring layer is disposed within the first dielectric material layer, and the first surface of the first wiring layer is exposed out of the first dielectric material layer for an electrical connection;
a first conductive pillar layer, disposed on the second surface of the first wiring layer;
a first buffer layer, disposed within the first conductive pillar layer, wherein the first buffer layer is disposed on the first dielectric material layer, and the first buffer layer is a molding compound material for chip packaging comprising one of a novolac-based resin, an epoxy-based resin, and a silicon-based resin;
a protection layer, disposed on the first buffer layer and a second wiring layer, wherein the protection layer is one of a solder resist layer, a photo-sensitive dielectric material layer, and a non-photo-sensitive dielectric material layer;
a second buffer layer, disposed between the first buffer layer and the protection layer, wherein the second buffer layer comprises a dielectric material;
the second wiring layer, disposed between the second buffer layer and the protection layer, wherein the second wiring layer extends and pass through the second buffer layer to connect to the first conductive pillar layer;
an external component, disposed on and electrically connected to the first surface of the first wiring layer, wherein the external component is selected from a group consisting of: an active component, a passive component, and a semiconductor chip;
an external molding compound layer, disposed on the external component and the first surface of the first wiring layer; and
a plurality of conductive elements, disposed on the second wiring layer.

2. The package apparatus of claim 1 , wherein the first conductive pillar layer further disposed on the first dielectric material layer, and the line width of the first conductive pillar layer is larger than the line width of the first wiring layer.

3. The package apparatus of claim 1 , further comprising: a conductive layer, wherein the conductive layer is disposed on the first wiring layer and the first dielectric material layer, and the first conductive pillar layer is disposed between the conductive layer and the second wiring layer.

4. A package apparatus, comprising:
a first wiring layer, having a first surface and a second surface wherein the first surface and the second surface are disposed opposite to each other;
a first dielectric material layer, disposed within the first wiring layer, wherein the first dielectric material layer comprises one of a resin, a silicon nitride material, and a silicon oxide material;
a first conductive pillar layer, disposed on the second surface of the first wiring layer;
a first buffer layer, disposed within the first conductive pillar layer, wherein the first buffer layer is a molding compound material for chip packaging comprising one of a novolac-based resin, an epoxy-based resin, and a silicon-based resin;
a second wiring layer, disposed on the first buffer layer and one end of the first conductive pillar layer;
a protection layer, disposed on the first buffer layer and the second wiring layer, wherein the protection layer is one of a solder resist layer, a photo-sensitive dielectric material layer, and a non-photo-sensitive dielectric material layer;
a second buffer layer, wherein the second buffer layer is disposed on the first dielectric material layer, the first buffer layer is disposed between the second buffer layer and the protection layer, and the second buffer layer comprises a dielectric material;
a third buffer layer, wherein the third buffer layer comprises a dielectric material, the third buffer is disposed between the first buffer layer and the protection layer, and the second wiring layer extends and passes through the third buffer layer to connect to the first conductive pillar layer;
first conductive layer; and
a second conductive pillar layer, wherein the second conductive pillar layer is disposed on the first wiring layer and passes through the second buffer layer, the first conductive layer is disposed on the second buffer layer and connected to the second conductive pillar layer, the first conductive pillar layer is disposed between the first conductive layer and the second wiring layer.

5. The package apparatus of claim 4 , further comprising:
a conductive layer, wherein the conductive layer is disposed on the first wiring layer and the first dielectric material layer, and the first conductive pillar layer is disposed between the conductive layer and the second wiring layer.

6. The package apparatus of claim 1 , further comprising:
a first conductive layer; and
a second conductive pillar layer, wherein the first conductive layer is disposed between the first conductive pillar layer and the second conductive pillar layer, and the second conductive pillar layer is disposed between the first conductive layer and the second wiring layer.

7. The package apparatus of claim 1 , further comprising:
a second buffer layer;
first conductive layer; and
a second conductive pillar layer;
wherein the second buffer layer is disposed on the first dielectric material layer, the first buffer layer is disposed between the second buffer layer and the protection layer, and the second buffer layer comprises a dielectric material; and
wherein the second conductive pillar layer is disposed on the first wiring layer and passes through the second buffer layer, the first conductive layer is disposed on the second buffer layer and connected to the second conductive pillar layer, the first conductive pillar layer is disposed between the first conductive layer and the second wiring layer.

8. The package apparatus of claim 7 , further comprising:
a second conductive layer, wherein the second conductive layer is disposed between the first wiring layer and the second conductive pillar layer.

9. A package apparatus, comprising:
a first wiring layer, having a first surface and a second surface wherein the first surface and the second surface are disposed opposite to each other;
a first dielectric material layer, disposed within the first wiring layer, wherein the first dielectric material layer comprises one of a resin, a silicon nitride material, and a silicon oxide material;
a first conductive pillar layer, disposed on the second surface of the first wiring layer;
a first buffer layer, disposed within the first conductive pillar layer, wherein the first buffer layer is a molding compound material for chip packaging comprising one of a novolac-based resin, an epoxy-based resin, and a silicon-based resin;
a second wiring layer, disposed on the first buffer layer and one end of the first conductive pillar layer;
a protection layer, disposed on the first buffer layer and the second wiring layer, wherein the protection layer is one of a solder resist layer, a photo-sensitive dielectric material layer, and a non-photo-sensitive dielectric material layer;
a first conductive layer;
a second conductive pillar layer, wherein the first conductive layer is disposed between the first conductive pillar layer and the second conductive pillar layer, and the second conductive pillar layer is disposed between the first conductive layer and the second wiring layer;
a second buffer layer; and
a third buffer layer;
wherein the first buffer is disposed on the first dielectric material layer,

Assignees

• Phoenix Pioneer Technology Co Ltd

Inventors

• Hsu Shih-Ping

Classifications

• H10W74/117

  the substrate having spherical bumps for external connection · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W72/072

  of bump connectors · CPC title

• H10W70/685 Primary

  comprising multiple insulating layers · CPC title