Configuring a switch for extracting packet header fields

US11245778B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-11245778-B1
Application numberUS-201916288074-A
CountryUS
Kind codeB1
Filing dateFeb 27, 2019
Priority dateAug 26, 2015
Publication dateFeb 8, 2022
Grant dateFeb 8, 2022

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for generating configuration data for configuring a hardware switch is described. The method receives a description of functionality for the hardware switch. Based on the description, the method generates sets of match and action entries to configure the hardware switch to process packets. The method then determines, for each packet header field in a parse graph that specifies instructions for a parser of the switch to extract packet header fields from packets, whether the packet header field is used or modified by at least one match or action entry. The method generates for the parser of the hardware switch configuration data that instructs the parser to extract (i) packet header fields used or modified by at least one match or action entry to a first set of registers and (ii) packet header fields not used by any match or action entries to a second set of registers.

First claim

Opening claim text (preview).

What is claimed is: 1. A method performed by a packet processing pipeline of a hardware forwarding element, the method comprising: in at least one of a plurality of match-action stages of the packet processing pipeline configured with match entries and corresponding action entries to use to process packets: providing values of one or more packet header fields used by a match entry of a match action stage or modified by an action entry of a match action stage to at least one match-action stage of the match-action stages and providing contents of one or more packet header fields not used by any match entries or modified by any action entries of the match-action stages to a deparser of the packet processing pipeline. 2. The method of claim 1 , wherein at least one of the match-action stages comprises a set of match tables against which at least a subset of the provided values are matched. 3. The method of claim 1 , comprising: the deparser assembling a second packet that comprises (1) modified header fields received from the match-action stages, (2) contents of one or more packet header fields not used by any match entries or modified by any action entries of the match-action stages, and (3) payload of a packet. 4. The method of claim 3 , comprising: providing the second packet to a queue to be subsequently forwarded to an egress pipeline of the hardware forwarding element. 5. The method of claim 3 , comprising: providing the second packet for transmission from the hardware forwarding element to another device through a network. 6. The method of claim 1 , comprising: configuring functionality for the hardware forwarding element using P4 code describing functionality of the packet processing pipeline. 7. The method of claim 1 , comprising: generating sets of match entries and corresponding action entries for the hardware forwarding element to use to process packets through the plurality of match-action stages of the packet processing pipeline. 8. The method of claim 7 , wherein generating sets of match entries and action entries comprises generating a table flow graph that specifies match entries of match tables and corresponding actions. 9. The method of claim 1 , wherein the one or more packet header fields used by a match entry of a match action stage or modified by an action entry of a match action stage comprise one or more of: GENEVE variable length fields, multi-layer tunneling packet header data, or TCP packet header bytes. 10. A hardware forwarding element comprising: a packet processing pipeline comprising a parser, plurality of match-action stages, and a deparser, the plurality of match-action stages configured with match entries and corresponding action entries to use to process packets, wherein at least one of the match-action stages of the packet processing pipeline is configured to (i) to provide values of one or more packet header fields used by a match entry of a match action stage or modified by an action entry of a match action stage to at least one match-action stage of the match-action stages and (ii) to provide contents of one or more packet header fields not used by any match entries or modified by any action entries of the match-action stages to the deparser. 11. The hardware forwarding element of claim 10 , wherein at least one of the match-action stages comprises a set of match tables against which at least a subset of the provided values are matched. 12. The hardware forwarding element of claim 10 , wherein the deparser is to form a second packet that comprises (1) modified header fields received from the match-action stages, (2) contents of one or more packet header fields not used by any match entries or modified by any action entries of the match-action stages, and (3) payload of a packet. 13. The hardware forwarding element of claim 12 , wherein the packet processing pipeline is to provide the second packet to a queue to be subsequently forwarded to an egress pipeline of the hardware forwarding element. 14. The hardware forwarding element of claim 12 , wherein the packet processing pipeline is to provide the second packet for transmission from the hardware forwarding element to another device through a network. 15. The hardware forwarding element of claim 10 , wherein functionality of the hardware forwarding element is configured using P4 code describing functionality of the packet processing pipeline. 16. The hardware forwarding element of claim 10 , wherein the one or more packet header fields used by a match entry of a match action stage or modified by an action entry of a match action stage comprise one or more of: GENEVE variable length fields, multi-layer tunneling packet header data, or TCP packet header bytes. 17. A non-transitory machine readable medium storing a program which when executed by at least one processing unit configures a packet processing pipeline of a hardware forwarding element, the program comprising sets of instructions for: configuring the hardware forwarding element that comprises a packet processing pipeline comprising a plurality of match-action stages so that at least one match-action stage is to: provide values of one or more packet header fields used by a match entry of a match action stage or modified by an action entry of a match action stage to at least one match-action stage of the plurality of match-action stages and provide contents of one or more packet header fields not used by any match entries or modified by any action entries of the plurality of match-action stages to a deparser of the packet processing pipeline. 18. The non-transitory machine readable medium of claim 17 , wherein the program comprises P4 code describing functionality of the packet processing pipeline. 19. The non-transitory machine readable medium of claim 17 , wherein at least one of the match-action stages comprises a set of match tables against which at least a subset of the provided values are matched. 20. The non-transitory machine readable medium of claim 17 , wherein the deparser is to form a second packet that comprises (1) modified header fields received from the match-action stages, (2) contents of one or more packet header fields not used by any match entries or modified by any action entries of the match-action stages, and (3) payload of a packet. 21. The non-transitory machine readable medium of claim 17 , wherein the one or more packet header fields used by a match entry of a match action stage or modified by an action entry of a match action stage comprise one or more of: GENEVE variable length fields, multi-layer tunneling packet header data, or TCP packet header bytes.

Assignees

Inventors

Classifications

  • Header conversion, routing tables or routing tags · CPC title

  • H04L69/22Primary

    Parsing or analysis of headers · CPC title

  • Address table lookup; Address filtering · CPC title

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Frequently asked questions

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What does patent US11245778B1 cover?
A method for generating configuration data for configuring a hardware switch is described. The method receives a description of functionality for the hardware switch. Based on the description, the method generates sets of match and action entries to configure the hardware switch to process packets. The method then determines, for each packet header field in a parse graph that specifies instruct…
Who is the assignee on this patent?
Barefoot Networks Inc
What technology area does this patent fall under?
Primary CPC classification H04L69/22. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 08 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).