Silicon carbide trench semiconductor device

Patent metadata

Field	Value
Publication number	US-11245016-B2
Application number	US-202016779374-A
Country	US
Kind code	B2
Filing date	Jan 31, 2020
Priority date	Jan 31, 2020
Publication date	Feb 8, 2022
Grant date	Feb 8, 2022

Abstract

A semiconductor apparatus has a silicon carbide substrate heavily doped with the first conductivity type and a lightly doped silicon carbide drift region of the first conductivity type over the silicon carbide substrate. A first body region in the drift region is doped with second conductivity type opposite the first. A first source region in the first body region is heavily doped with the first conductivity type. A gate trench is formed in the first source region and first body region. At least one sidewall of the gate trench is parallel to a crystal plane of the silicon carbide structure having greater carrier mobility than a C-face thereof. The gate trench extends a length of the first body region and the source region to a separation region laterally adjacent to the first region wherein the separation region is in the drift region.

First claim

What is claimed is:

1. An apparatus, comprising:
a silicon carbide substrate heavily doped with the first conductivity type;
a lightly doped silicon carbide drift region of the first conductivity type over the silicon carbide substrate;
a first body region in the drift region doped with second conductivity type wherein the second conductivity type is the opposite of the first conductivity type;
a first source region in the first body region heavily doped with the first conductivity type;
a gate trench formed in the first source region and first body region wherein at least one sidewall of the gate trench is parallel to a crystal plane of the silicon carbide structure having higher carrier mobility than a C-face of the silicon carbide structure and wherein the gate trench extends a length of the first body region and the source region to a separation region laterally adjacent to the first body region wherein the separation region is in the drift region; and
a second body region in the drift region heavily doped with the second conductivity type and a second source region heavily doped with the first conductivity in the second body region wherein the first and second body region are separated by the separation region and wherein the gate trench extends across the separation region through the second body region and the second source region.

2. The apparatus of claim 1 , wherein a doping concentration of the first body region increases with depth so that a maximum dopant concentration occurs at a maximum depth of the body region.

3. The apparatus of claim 1 , wherein doping concentrations of the first and second body regions increases with depth so that the maximum concentration occurs at maximum depths of the first and second body regions.

4. The apparatus of claim 1 wherein a depth of the gate trench is deeper than the first source region and extends into the first body region and above the drift region.

5. The apparatus of claim 1 further comprising a surface body region heavily doped with the second conductivity type on top of the body region.

6. The apparatus of claim 1 wherein the first body region includes portions on both sides of the gate trench and the portion of first body region opposite the crystal plane of the silicon carbide structure does not have a source region.

7. The apparatus of claim 6 wherein the portion of the first body region on the side of the gate trench opposite the crystal plane of the silicon carbide structure extends the length of the gate trench with no separation region laterally adjacent to the first body region in the drift region.

8. The apparatus of claim 1 further comprising a bridge region heavily doped with the second conductivity type underneath the gate trench in the separation region.

9. The apparatus of claim 8 wherein the bridge region is a deep implant that is wider than the gate trench and wherein the top of the bridge region is above the bottom of the gate trench.

10. The apparatus of claim 8 wherein the bridge region is a body implant and is narrower than the width of the gate trench.

11. The apparatus of claim 8 wherein the bridge region extends the depth of the gate trench and the width of a bottom of the gate trench leaving one side of the gate trench exposed to the separation region.

12. The apparatus of claim 1 wherein the separation region is more heavily doped with the first conductivity type than the lightly doped drift region.

13. The apparatus of claim 1 further comprising a trench gate dielectric layer lining the inner surface of the gate trench and a trench gate electrode layer on top of the trench gate dielectric layer.

14. The apparatus of claim 13 further comprising a planar gate dielectric layer on top of the separation region and first body region and a planar gate electrode layer on top of the planar gate dielectric layer wherein the planar gate electrode layer is in electrically conductive contact with the trench gate electrode layer.

15. The apparatus of claim 1 , wherein the crystal plane of the silicon carbide structure having higher carrier mobility than a C-face of the silicon carbide structure is a 11 2 0 face of the silicon carbide structure.

16. A method for making a silicon carbide trench semiconductor device, comprising:
a) forming a lightly doped silicon carbide drift region of a first conductivity type over a silicon carbide substrate;
b) forming a first body region in the drift region doped with a second conductivity type wherein the second conductivity type is the opposite of the first conductivity type;
c) forming a first source region in the first body region heavily doped with the first conductivity type;
d) forming a gate trench in the first source region and first body region wherein at least one sidewall of the gate trench is parallel to a 11 2 0 face of the silicon carbide structure
and wherein the gate trench extends a length of the first body region and the source region to a separation region laterally adjacent to the first body region wherein the separation region formed in the drift region; and
forming a second body region in the drift region heavily doped with the second conductivity type and a second source region heavily doped with the first conductivity in the second body region wherein the first and second body region are separated by the separation region and wherein the gate trench extends across the separation region through the second body region and the second source region.

17. The method of claim 16 , wherein the first body region includes portions on both sides of the gate trench and a source region is not formed in the portion of first body region opposite the crystal plane of the silicon carbide structure.

18. The method of claim 17 , wherein a portion of the first body region on a side of the gate trench opposite the 11 2 0 face is formed to extend the length of the gate trench with no separation region laterally adjacent to the first body region in the drift region.

19. The method of claim 16 further comprising forming a planar gate dielectric layer on top of the separation region and first body region and forming a planar gate electrode layer on top of the planar gate dielectric layer wherein the planar gate electrode layer is in electrically conductive contact with a trench gate electrode layer disposed inside the gate trench.

Assignees

• Alpha & Omega Semiconductor Cayman Ltd

Inventors

• Sheridan David
• Pala Vipindas
• Bobde Madhur

Classifications

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H10P30/22

  using masks · CPC title

• H10D64/01366

  the semiconductor being silicon carbide · CPC title

• H10D30/662

  having a drift region having a doping concentration that is higher between adjacent body regions relative to other parts of the drift region · CPC title

• H10D30/0297

  using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title