Digital-to-analog conversion system

Patent metadata

Field	Value
Publication number	US-11239866-B2
Application number	US-202016924274-A
Country	US
Kind code	B2
Filing date	Jul 9, 2020
Priority date	Mar 29, 2019
Publication date	Feb 1, 2022
Grant date	Feb 1, 2022

Abstract

A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.

First claim

The invention claimed is:

1. A system for processing a transmit signal, comprising:
a digital pre-distortion circuitry configured to pre-distort a transmit signal;
a digital-to-analog converter configured to generate an analog signal based on the pre-distorted transmit signal;
a power amplifier configured to amplify the analog signal for generating an amplified analog signal;
a feedback loop for providing a digital feedback signal to the digital pre-distortion circuitry,
wherein the feedback loop comprises an analog-to-digital converter configured to generate the digital feedback signal based on the amplified analog signal,
wherein the analog-to-digital converter is configured to sample the amplified analog signal at irregular time intervals to generate the digital feedback signal and a sampling rate of the analog-to-digital converter is lower than a sampling rate of the digital-to-analog converter.

2. The system of claim 1 , wherein the sampling rate of the analog-to-digital converter is constant on average.

3. The system of claim 1 , wherein the analog-to-digital converter is configured to sample the amplified analog signal either at regular time intervals or irregular time intervals in response to a control signal.

4. The system of claim 1 , wherein the feedback loop further comprises a filter with a fix cutoff frequency, wherein the filter is coupled between the power amplifier and the analog-to-digital converter.

5. The system of claim 4 , wherein the cutoff frequency is independent from an instantaneous value of the sampling rate of the digital-to-analog converter.

6. The system of claim 4 , wherein the cutoff frequency is equal to half of a maximum value of the sampling rate of the digital-to-analog converter.

7. The system of claim 4 , wherein an input bandwidth of the filter is equal to or higher than half of a maximum value of the sampling rate of the digital-to-analog converter.

8. The system of claim 1 , wherein the analog-to-digital converter is configured to:
receive a clock signal;
count a number of clock cycles;
sample the amplified analog signal every time the number of clock cycles is equal to a stored value; and
update the stored value after sampling the amplified analog output signal.

9. The system of claim 1 , further comprising a clock divider circuit configured to receive a first clock signal and to divide the first clock signal with a varying division factor to generate a second clock signal, wherein the analog-to-digital converter is configured to sample the amplified analog signal based on the second clock signal.

10. The system of claim 1 , further comprising:
a second feedback loop for providing a second digital feedback signal to the digital pre-distortion circuitry, wherein the second feedback loop comprises a second analog-to-digital converter configured to generate the second digital feedback signal based on the analog signal, and wherein a sampling rate of the second analog-to-digital converter is lower than a sampling rate of the digital-to-analog converter.

11. The system of claim 10 , wherein the sampling rate of the second analog-to-digital converter is constant on average.

12. The system of claim 10 , wherein the second analog-to-digital converter is configured to sample the amplified analog signal either at regular time intervals or irregular time intervals in response to a control signal.

13. A method for processing a transmit signal, comprising:
pre-distorting, by a digital pre-distortion circuitry, a transmit signal;
generating, by a digital-to-analog converter, an analog signal based on the pre-distorted transmit signal;
amplifying, by a power amplifier, the analog signal;
generating, by an analog-to-digital converter, a digital feedback signal based on the amplified analog signal; and
providing the digital feedback signal to the pre-distortion circuitry,
wherein the analog-to-digital converter samples the amplified analog signal at irregular time intervals to generate the digital feedback signal and a sampling rate of the analog-to-digital converter is lower than a sampling rate of the digital-to-analog converter.

14. The method of claim 13 , wherein the sampling rate of the analog-to-digital converter is constant on average.

15. The method of claim 13 , wherein the analog-to-digital converter is configured to sample the amplified analog signal either at regular time intervals or irregular time intervals in response to a control signal.

16. The method of claim 13 further comprising:
generating, by a second analog-to-digital converter, a second digital feedback signal based on the analog signal; and
providing the second digital feedback signal to the pre-distortion circuitry,
wherein a sampling rate of the second analog-to-digital converter is lower than a sampling rate of the digital-to-analog converter, and the analog signal is sampled by the second analog-to-digital converter at irregular time intervals.

17. The method of claim 16 , wherein the sampling rate of the second analog-to-digital converter is constant on average.

18. The method of claim 16 , wherein the second analog-to-digital converter is configured to sample the amplified analog signal either at regular time intervals or irregular time intervals in response to a control signal.

Assignees

• Intel Corp

Inventors

• Gruber Daniel
• Sanchez Ramon
• Azadet Kameran
• Clara Martin

Classifications

• H04B2001/0425

  with linearisation using predistortion · CPC title

• H04B1/0017 Primary

  Digital filtering (H04B1/001 takes precedence; digital filters per se H03H17/00) · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03F1/3247 Primary

  using feedback acting on predistortion circuits (H03F1/3264 takes precedence) · CPC title

• H04B2001/0408

  with power amplifiers · CPC title