Solid state circuit interrupter

US11239649B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11239649-B2
Application numberUS-202016775976-A
CountryUS
Kind codeB2
Filing dateJan 29, 2020
Priority dateJan 29, 2020
Publication dateFeb 1, 2022
Grant dateFeb 1, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit interrupter including a current sensor having a normal sensor output and an over current detection output, a solid state switch module structured to have a closed state to allow current to flow through the circuit interrupter and an open state to interrupt current flowing through the circuit interrupter, a gate driver structured to control the solid state switch module including a desaturation function output, wherein the gate driver is structured to cause the solid state switch module to interrupt current flowing through the circuit interrupter when the DESAT function output changes to the on state, and an electronic trip circuit structured to output a trip signal to the gate driver when the normal sensor output reaches a first threshold level or the overcurrent detection output changes to the on state.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit interrupter structured to electrically connect between a power source and a load, the circuit interrupter comprising: a current sensor structured to sense current flowing through the circuit interrupter and having a normal sensor output proportional to the current flowing through the circuit interrupter and an over current detection (OCD) output that changes to an on state when the current flowing through the circuit interrupter reaches a second threshold level; a solid state switch module structured to have a closed state to allow current to flow through the circuit interrupter and an open state to interrupt the current flowing through the circuit interrupter; a gate driver structured to control the solid state switch module to interrupt the current flowing through the circuit interrupter, wherein the gate driver includes a desaturation (DESAT) function output that changes to an on state when the current flowing through the circuit interrupter reaches a third threshold level, and wherein the gate driver is structured to cause the solid state switch module to interrupt the current flowing through the circuit interrupter when the DESAT function output changes to the on state; and an analog trip circuit structured to receive the normal sensor output and the OCD output and to output a trip signal to the gate driver when the normal sensor output reaches a first threshold level or the OCD output changes to the on state, wherein the trip signal causes the gate driver to control the solid state switch module to interrupt the current flowing through the circuit interrupter. 2. The circuit interrupter of claim 1 , wherein the analog trip circuit is structured to output the trip signal based on the normal sensor such that the solid state switch module interrupts the current flowing through the circuit interrupter within a first predetermined period of time, wherein the analog trip circuit is structured to output the trip signal based on the OCD output such that the solid state switch module interrupts the current flowing through the circuit interrupter within a second predetermined period of time, wherein the gate driver is structured to cause the solid state switch module to interrupt the current flowing through the circuit interrupter based on the DESAT function output within a third predetermined period of time, wherein the third predetermined period of time is less than the second predetermined period of time and the second predetermined period of time is less than the first predetermined period of time. 3. The circuit interrupter of claim 2 , wherein the first predetermined period of time is about 4 microseconds, the second predetermined period of time is about 2.5 microseconds, and the third predetermined period of time is about 0.5 microseconds. 4. The circuit interrupter of claim 2 , wherein the analog trip circuit is structured to output the trip signal based on the normal sensor output within about 100 nanoseconds of receiving the normal sensor output, and wherein the analog trip circuit is structured to output the trip signal based on the OCD output within about 10 nanoseconds of receiving the OCD output. 5. The circuit interrupter of claim 2 , wherein the gate driver includes a capacitor, and wherein the third predetermined time is based in part on a capacitance of the capacitor. 6. The circuit interrupter of claim 1 , wherein the first threshold level is within a range of about 2 times a rated current of the circuit interrupter to about 7.5 times the rated current, wherein the second threshold level is about 7.5 times the rated current, and wherein the third threshold level is about 22.5 times the rated current. 7. The circuit interrupter of claim 1 , wherein the DESAT function output is based on a voltage drop of a solid state switch in the solid state switch module that is based on a level of the current flowing through the solid state switch module. 8. The circuit interrupter of claim 1 , wherein the current sensor is a Hall-Effect sensor. 9. The circuit interrupter of claim 1 , wherein the solid state switch module includes at least one solid state switch. 10. The circuit interrupter of claim 9 , wherein the at least one solid state switch is a metal oxide semiconductor field effect transistor (MOSFET) or an insulated-gate bipolar transistor (IGBT). 11. The circuit interrupter of claim 1 , further comprising: separable contacts; and an operating mechanism structured to open the separable contacts, wherein opening the separable contacts provides galvanic isolation between the power source and the load. 12. A circuit interrupter structured to electrically connect between a power source and a load, the circuit interrupter comprising: separable contacts structured to open to provide galvanic isolation between the power source and the load; an operating mechanism structured to open and close the separable contacts; a first position sensor structured to sense a position of the separable contacts; a solid state switch module structured to have a closed state to avow current to flow through the circuit interrupter and an open state to interrupt the current flowing through the circuit interrupter; and an electronic trip unit structured to control the solid state switch module to change between the open state and the closed state and to control the operating mechanism to open the separable contacts, wherein, based on an output of the first position sensor, the electronic trip unit is structured to control the solid state switch module to change from the open state to the closed state when the separable contacts are in a closed position, the circuit interrupter further comprising: a first switch operable by a user; and a second switch operable by a user, wherein the electronic trip unit is structured to control the solid state switch module to change from the closed state to the open state and subsequently control the operating mechanism to open the separable contacts in response to the user operating the first switch, and wherein the electronic trip unit is structured to control the operating mechanism to close the separable contacts and subsequently control the solid state switch module to change to the closed state in response to the user operating the second switch. the circuit interrupter, further comprising: a second position sensor structured to sense a position of the first switch; and a third position sensor structured to sense a position of the second switch, wherein the electronic trip unit is structured to control the solid state switch module to change from the closed state to the open state and subsequently control the operating mechanism to open the separable contacts in response to the user operating the first switch based on an output of the second position sensor, and wherein the electronic trip unit is structured to control the operating mechanism to close the separable contacts and subsequently control the solid state switch module to change to the closed state in response to the user operating the second switch based on an output of the third position sensor. 13. The circuit interrupter of claim 12 , wherein the electronic trip unit is structured to control the solid state switch module to change from the closed state to the open state before controlling the operating mechanism to open the separable contacts. 14. The circuit interrupter of claim 12 , wherein the operating mechanism includes a movable arm coupled to the separable contacts such that moving the movable arm causes the separable contacts to open or close, and wherein the first position sensor is structured to sense the positio

Assignees

Inventors

Classifications

  • H02H3/0935Primary

    the timing being determined by numerical means · CPC title

  • responsive to excess current (responsive to abnormal temperature caused by excess current H02H5/04) · CPC title

  • with means for increasing reliability, e.g. redundancy arrangements {(for logic circuits H03K19/003)} · CPC title

  • Calibration or setting of parameters · CPC title

  • Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks · CPC title

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What does patent US11239649B2 cover?
A circuit interrupter including a current sensor having a normal sensor output and an over current detection output, a solid state switch module structured to have a closed state to allow current to flow through the circuit interrupter and an open state to interrupt current flowing through the circuit interrupter, a gate driver structured to control the solid state switch module including a des…
Who is the assignee on this patent?
Eaton Intelligent Power Ltd
What technology area does this patent fall under?
Primary CPC classification H02H3/0935. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).