Display module with improved electrical test and manufacturing method of the display module

Patent metadata

Field	Value
Publication number	US-11239122-B2
Application number	US-201916717307-A
Country	US
Kind code	B2
Filing date	Dec 17, 2019
Priority date	Dec 19, 2018
Publication date	Feb 1, 2022
Grant date	Feb 1, 2022

Abstract

A display module including a glass substrate; a thin film transistor layer disposed in a first area of the glass substrate; a plurality of connection pads disposed in a second area extending from the first area of the glass substrate and electrically connected to the thin film transistor layer; a plurality of test pads disposed in a third area extending from the second area of the glass substrate and electrically connected to the plurality of connection pads, respectively, and a plurality of connection wirings electrically connecting the plurality of connection pads and the plurality of test pads.

First claim

What is claimed is:

1. A display module comprising:
a glass substrate;
a thin film transistor layer disposed on a first area of the glass substrate;
a plurality of connection pads disposed in a second area of the glass substrate extending from the first area of the glass substrate and electrically connected to the thin film transistor layer;
a plurality of test pads disposed in a third area of the glass substrate extending from the second area of the glass substrate and electrically connected to the plurality of connection pads, respectively; and
a plurality of connection wirings electrically connecting the plurality of connection pads and the plurality of test pads.

2. The display module as claimed in claim 1 , wherein the plurality of connection wirings are disposed in the second and third areas of the glass substrate,
wherein the plurality of connection wirings comprise at least one of molybdenum (Mo), titanium (Ti) and TiMo, and
wherein insulating layers are disposed on upper and lower portions of the plurality of connection wirings, respectively.

3. The display module as claimed in claim 1 , wherein the plurality of test pads are removed after a substrate test is performed, and
wherein the plurality of test pads are disposed in zigzag along the third area.

4. The display module as claimed in claim 3 , wherein an area of each of the plurality of test pads is greater than an area of each of the plurality of connection pads.

5. The display module as claimed in claim 1 , wherein the plurality of test pads are formed integrally with the plurality of connection pads corresponding to each other.

6. The display module as claimed in claim 1 , further comprising a plurality of low resistance wirings disposed between each of the plurality of test pads and each of the plurality of connection wirings.

7. The display module as claimed in claim 1 , wherein the glass substrate has a quadrangular shape, and
the third area of the glass substrate comprising two adjacent side surface portions of the glass substrate.

8. The display module as claimed in claim 1 , wherein the plurality of connection wirings comprise a plurality of sub-connection wirings spaced apart from each other at a predetermined interval.

9. A display module comprising:
a glass substrate;
a thin film transistor layer formed on a first surface of the glass substrate;
a plurality of light emitting diodes (LEDs) mounted on the thin film transistor layer;
a plurality of connection pads formed on the first surface of the glass substrate;
a plurality of driving pads formed on a second surface of the glass substrate;
a plurality of side wirings configured to electrically connect the plurality of connection pads and the plurality of driving pads corresponding to each of the plurality of connection pads; and
a plurality of connection wirings configured to connect a plurality of connection pads and a plurality of test pads in a dummy area extending to an edge area of the glass substrate,
wherein the plurality of test pads and a portion of each of the plurality of connection wirings corresponding to the plurality of test pads are removed after a substrate test is performed.

10. The display module as claimed in claim 9 , wherein the plurality of connection wirings are electrically connected to the plurality of side wirings.

11. The display module as claimed in claim 9 , wherein each of the plurality of connection wirings is covered with a first insulating layer on one surface and a second insulating layer on the other surface.

12. The display module as claimed in claim 9 , wherein the plurality of connection pads are formed integrally with the plurality of removed test pads, and
wherein one surface of each of the plurality of connection wirings is connected to the plurality of connection pads.

13. The display module as claimed in claim 9 , wherein each of the plurality of connection wirings comprises a plurality of sub-connection wirings spaced apart from each other at a predetermined interval.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Jung Youngki
• Kim Jinho
• Shin Sangmin
• Lee Changjoon

Classifications

• H10W90/00

  Package configurations · CPC title

• H10P74/273 Primary

  Interconnections for measuring or testing, e.g. probe pads · CPC title

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title