Light-emitting diode displays

Patent metadata

Field	Value
Publication number	US-11233113-B2
Application number	US-202016826521-A
Country	US
Kind code	B2
Filing date	Mar 23, 2020
Priority date	Mar 28, 2016
Publication date	Jan 25, 2022
Grant date	Jan 25, 2022

Abstract

A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

First claim

What is claimed is:

1. A display having an active area with a notch, comprising:
a substrate;
organic light-emitting diode pixels on the substrate, wherein some of the organic light-emitting diode pixels are positioned on a first side of the notch and some of the organic light-emitting diode pixels are positioned on a second side of the notch;
display driver circuitry;
data lines coupled to the display driver circuitry and the organic light-emitting diode pixels;
gate lines coupled to the display driver circuitry and the organic light-emitting diode pixels, wherein the organic light-emitting diode pixels are arranged in columns and rows, wherein the gate lines in a first area of the display that includes the notch are coupled to fewer of the organic light-emitting diode pixels than the gate lines in a second area of the display; and
dummy pixels that are coupled to the gate lines in the first area.

2. The display defined in claim 1 , wherein the dummy pixels do not emit light.

3. The display defined in claim 1 , wherein the dummy pixels do not contain emissive material for light-emitting diodes.

4. The display defined in claim 1 , wherein the dummy pixels impose progressively decreasing amounts of loading on the gate lines of the first area at progressively increasing distances between the second area and the gate lines of the first area.

5. The display defined in claim 1 , wherein a first gate line in the first area of the display is coupled to a first number of dummy pixels, wherein a second gate line in the first area of the display is coupled to a second number of dummy pixels, and wherein the first number is greater than the second number.

6. The display defined in claim 5 , wherein the first gate line is a first distance from the second area, wherein the second gate line is a second distance from the second area, and wherein the second distance is greater than the first distance.

7. The display defined in claim 1 , wherein the dummy pixels do not include anodes.

8. The display defined in claim 1 , wherein the dummy pixels are positioned in the notch.

9. The display defined in claim 8 , wherein the dummy pixels are positioned on the substrate in an inactive area of the display.

10. The display defined in claim 1 , wherein rows in the first area of the display are interrupted by the notch.

11. A display having an active area and an inactive area, comprising:
a substrate with a notch, wherein the notch has first and second opposing sides;
organic light-emitting diode pixels on the substrate that form the active area, wherein some of the organic light-emitting diode pixels are positioned on the first side of the notch and some of the organic light-emitting diode pixels are positioned on the second side of the notch;
display driver circuitry;
gate lines coupled to the display driver circuitry and rows of the organic light-emitting diode pixels; and
dummy pixels that are coupled to at least some of the gate lines and that are formed in the inactive area between the active area and the notch.

12. The display defined in claim 11 , wherein the dummy pixels do not emit light.

13. The display defined in claim 11 , wherein the dummy pixels do not contain emissive material for light-emitting diodes.

14. The display defined in claim 11 , wherein the dummy pixels do not include anodes.

15. The display defined in claim 11 , wherein the dummy pixels impose loading on the gate lines of rows interrupted by the notch.

16. A display having an active area and an inactive area, comprising:
a substrate with a notch, wherein the notch has first and second opposing sides connected by a third side;
organic light-emitting diode pixels on the substrate that form the active area, wherein some of the organic light-emitting diode pixels are positioned on the first side of the notch and some of the organic light-emitting diode pixels are positioned on the second side of the notch;
display driver circuitry;
data lines coupled to the display driver circuitry and the organic light-emitting diode pixels; and
gate lines coupled to the display driver circuitry and the organic light-emitting diode pixels, wherein the organic light-emitting diode pixels are arranged in columns and rows, wherein the gate lines in a first area of the display that includes the notch are coupled to fewer of the organic light-emitting diode pixels than the gate lines in a second area of the display, wherein the gate lines in the first area include a gate line that extends in the inactive area between the notch and the active area from the first side of the notch to the second side of the notch, wherein the gate line in the first area of the display is coupled to only one gate driver, and wherein an additional gate line in the second area of the display is coupled to first and second gate drivers.

17. The display defined in claim 16 , wherein the gate line extends parallel to the third side of the notch in the inactive area between the notch and the active area from the first side of the notch to the second side of the notch.

18. The display defined in claim 16 , wherein the gate line is one of multiple gate lines in the first area that extends in the inactive area between the notch and the active area from the first side of the notch to the second side of the notch.

Assignees

• Apple Inc

Inventors

• Yu Cheng-Ho
• Lin Chin-Wei
• Yang Shyuan
• Chang Ting-Kuo
• Tsai Tsung-Ting
• Rieutort-Louis Warren S
• Chang Shih-Chang
• Chen yu cheng
• Zhong John Z

Classifications

• H10K59/88

  Dummy elements, i.e. elements having non-functional features · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/3266 Primary

  Details of drivers for scan electrodes · CPC title

• G09G2300/0413

  Details of dummy pixels or dummy lines in flat panels · CPC title