Printed circuit board

US11229118B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11229118-B2
Application numberUS-201916674640-A
CountryUS
Kind codeB2
Filing dateNov 5, 2019
Priority dateNov 14, 2018
Publication dateJan 18, 2022
Grant dateJan 18, 2022

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board, comprising a flexible insulating layer, a rigid insulating layer laminated on a portion of the flexible insulating layer, and a coverlay disposed on an upper surface of the rigid insulating layer, an upper surface of the flexible insulating layer, and a side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the upper surface of the flexible insulating layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed circuit board, comprising: a flexible insulating layer; a rigid insulating layer disposed directly on a first portion of an upper surface of the flexible insulating layer; and a coverlay comprising a first portion disposed on an upper surface of the rigid insulating layer, a second portion disposed on a second portion of the upper surface of the flexible insulating layer connected to and different from the first portion, and a third portion disposed on a side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the upper surface of the flexible insulating layer, and wherein the first portion of the coverlay and the second portion of the coverlay form a step connected by the third portion of the coverlay. 2. The printed circuit board of claim 1 , wherein the first portion of the coverlay is adhered to the upper surface of the rigid insulating layer, the second portion of the coverlay is adhered to the second portion of the upper surface of the flexible insulating layer, and the third portion of the coverlay is adhered to the side surface of the rigid insulating layer by an adhesion layer. 3. The printed circuit board of claim 2 , wherein the adhesion layer is bonded to the upper surface of the rigid insulating layer, the second portion of the upper surface of the flexible insulating layer, and the side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the upper surface of the flexible insulating layer. 4. The printed circuit board of claim 1 , wherein the coverlay is formed of any one or any combination of any two or more of polyimide (PI), a liquid-crystal polymer (LCP), or Teflon. 5. The printed circuit board of claim 2 , wherein a thickness of the adhesion layer is smaller than a thickness of the coverlay. 6. The printed circuit board of claim 2 , further comprising: a first circuit formed on the upper surface of the flexible insulating layer and covered by the coverlay; and a second circuit formed on the rigid insulating layer and covered by the coverlay. 7. The printed circuit board of claim 6 , wherein a side surface of the second circuit is exposed to a side surface of the rigid insulating layer and covered by the coverlay. 8. The printed circuit board of claim 6 , further comprising: a via penetrating through the coverlay and the adhesion layer and electrically connecting to the second circuit. 9. The printed circuit board of claim 1 , wherein the rigid insulating layer is formed of a plurality of layers, and the coverlay is bonded to an uppermost layer of the plurality of layers. 10. A method of manufacturing a printed circuit board, comprising: forming a flexible insulating layer; forming a rigid insulating layer on a first portion of an upper surface of the flexible insulating layer; and disposing a coverlay comprising a first portion disposed on an upper surface of the rigid insulating layer, a second portion disposed on a second portion of the upper surface of the flexible insulating layer connected to and different from the first portion, and a third portion disposed on a side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the upper surface of the flexible insulating layer, wherein the first portion of the upper surface of the flexible insulating layer is formed in direct contact with the rigid insulating layer, and wherein the first portion of the coverlay and the second portion of the coverlay form a step connected by the third portion of the coverlay. 11. The method of claim 10 , wherein the first portion of the coverlay is adhered to the upper surface of the rigid insulating layer, the second portion of the coverlay is adhered to the second portion of the upper surface of the flexible insulating layer, and the third portion of the coverlay is adhered to the side surface of the rigid insulating layer by an adhesion layer. 12. The method of claim 11 , wherein the coverlay is formed of any one or any combination of any two or more of polyimide (PI), a liquid-crystal polymer (LCP), or Teflon. 13. The method of claim 12 , wherein a thickness of the adhesion layer is formed smaller than a thickness of the coverlay. 14. The method of claim 11 , further comprising: forming a first circuit on the upper surface of the flexible insulating layer; disposing the coverlay on the formed first circuit; and forming a second circuit on the rigid insulating layer and disposing the coverlay on the formed second circuit.

Assignees

Inventors

Classifications

  • Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

  • H05K3/281Primary

    by means of a preformed insulating foil (H05K3/284 takes precedence) · CPC title

  • H05K1/147Primary

    at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit (H05K1/148 takes precedence) · CPC title

  • Via in pad; Pad over filled via · CPC title

  • H05K3/4691Primary

    Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers · CPC title

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What does patent US11229118B2 cover?
A printed circuit board, comprising a flexible insulating layer, a rigid insulating layer laminated on a portion of the flexible insulating layer, and a coverlay disposed on an upper surface of the rigid insulating layer, an upper surface of the flexible insulating layer, and a side surface of the rigid insulating layer positioned between the upper surface of the rigid insulating layer and the …
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H05K3/281. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 18 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).