Programmable broadcast address

Patent metadata

Field	Value
Publication number	US-11226901-B2
Application number	US-201916527285-A
Country	US
Kind code	B2
Filing date	Jul 31, 2019
Priority date	Jul 31, 2019
Publication date	Jan 18, 2022
Grant date	Jan 18, 2022

Abstract

A method for initializing functional blocks on an electronic chip includes writing a programmable broadcast address to one or more functional blocks in a broadcast group; setting the one or more functional blocks in the broadcast group to a broadcast enable mode; writing one or more transactions to the programmable broadcast address; and disabling the broadcast enable mode.

First claim

What is claimed is:

1. A method for initializing functional blocks on an electronic chip, comprising:
writing a programmable broadcast address to one or more functional blocks in a broadcast group with the programmable broadcast address corresponding to an address of a memory location within the one or more functional blocks;
setting the one or more functional blocks in the broadcast group to a broadcast enable mode; and
writing one or more transactions to the programmable broadcast address.

2. The method of claim 1 , further comprising identifying two or more functional blocks that share at least a subset of control status register (“CSR”) definitions.

3. The method of claim 2 , further comprising placing the two or more functional blocks in the broadcast group.

4. The method of claim 1 , further comprising selecting, from a memory location, the programmable broadcast address for the broadcast group.

5. The method of claim 1 , further comprising generating the programmable broadcast address for the broadcast group.

6. The method of claim 1 , wherein setting the one or more functional blocks in the broadcast group to the broadcast enable mode comprises writing a broadcast mode bit to each functional block in the broadcast group.

7. The method of claim 1 , wherein writing a programmable broadcast address to one or more functional blocks in a broadcast group comprises writing the programmable broadcast address to a unique address for at least one of the functional blocks in the broadcast group.

8. The method of claim 1 , further comprising disabling the broadcast enable mode, wherein disabling the broadcast enable mode comprises clearing a broadcast mode bit in each functional block in the broadcast group.

9. The method of claim 1 , wherein each functional block in the broadcast group comprises one or more host clients distributed around one or more buses.

10. The method of claim 9 , wherein the one or more buses are Panicle control status register (“CSR”) Register Access Block (“PCRAB”) client bus rings.

11. A system for initializing functional blocks on an electronic chip comprising:
an initialization controller; and
instructions that when executed by the initialization controller cause the initialization controller to:
write a programmable broadcast address to one or more functional blocks in a broadcast group with the programmable broadcast address corresponding to an address of a memory location within the one or more functional blocks;
set the one or more functional blocks in the broadcast group to a broadcast enable mode;
write one or more transactions to the programmable broadcast address; and
disable the broadcast enable mode.

12. The system of claim 11 , wherein the instructions further cause the initialization controller to identify two or more functional blocks that share at least a subset of control status register definitions.

13. The system of claim 12 , wherein the instructions further cause the initialization controller to place the two or more functional blocks in the broadcast group.

14. The system of claim 11 , wherein the instructions further cause the initialization controller to select the programmable broadcast address for the broadcast group.

15. The system of claim 11 , wherein the instructions further cause the initialization controller to generate the programmable broadcast address for the broadcast group.

16. The system of claim 15 , wherein the instructions further cause the initialization controller to write a broadcast mode bit to each functional block in the broadcast group.

17. The system of claim 11 , wherein the instructions further cause the initialization controller to clear the broadcast mode bit in each functional block in the broadcast group.

18. A non-transitory, computer-readable medium storing computer-executable instructions, which when executed, cause an initialization controller to:
write a programmable broadcast address to one or more functional blocks in a broadcast group with the programmable broadcast address corresponding to an address of a memory location within the one or more functional blocks;
set the one or more functional blocks in the broadcast group to a broadcast enable mode;
write one or more transactions to the programmable broadcast address; and
disable the broadcast enable mode.

19. The non-transitory, computer-readable medium of claim 18 , wherein the computer-executable instructions further cause the initialization controller to select, from a memory location, the programmable broadcast address for the broadcast group.

20. The non-transitory, computer-readable medium of claim 18 , wherein the computer-executable instructions further cause the initialization controller to set the one or more functional blocks in the broadcast group to the broadcast enable mode by writing a broadcast mode bit to each functional block in the broadcast group.

Assignees

• Hewlett Packard Entpr Dev Lp

Inventors

• Tillema John E

Classifications

• G06F9/466

  Transaction processing · CPC title

• G06F12/0811

  with multilevel cache hierarchies · CPC title

• G06F8/654

  using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories · CPC title

• G06F9/30101

  Special purpose registers · CPC title

• G06F12/0833 Primary

  in combination with broadcast means (e.g. for invalidation or updating) · CPC title