Method and system for formation of stabilized tetragonal barium titanate

Patent metadata

Field	Value
Publication number	US-11226507-B2
Application number	US-202017083141-A
Country	US
Kind code	B2
Filing date	Oct 28, 2020
Priority date	Oct 29, 2019
Publication date	Jan 18, 2022
Grant date	Jan 18, 2022

Abstract

An electro-optic device includes a substrate and a waveguide on the substrate. The waveguide includes a layer stack including a plurality of electro-optic material layers interleaved with a plurality of interlayers, a waveguide core adjacent to the layer stack, a waveguide cladding layer, and a pair of electrodes in electrical contact with the plurality of electro-optic material layers. The plurality of interlayers maintains a first lattice structure at room temperature and a cryogenic temperature. The plurality of electro-optic material layers maintains a second lattice structure and crystallographic phase at the room temperature and the cryogenic temperature.

First claim

What is claimed is:

1. A method comprising:
depositing a seed layer on a substrate;
epitaxially depositing a first electro-optic material layer on the seed layer;
annealing the substrate, the seed layer, and the first electro-optic material layer in an oxygen environment, thereby forming an oxide buffer layer between the substrate and the seed layer;
cooling the substrate after the annealing, thereby causing the first electro-optic material layer to be under tensile stress;
depositing a first interlayer on the first electro-optic material layer, wherein the first interlayer includes a material that maintains a first lattice structure at room temperature and a cryogenic temperature;
depositing a second electro-optic material layer on the first interlayer; and
annealing the second electro-optic material layer and the first interlayer.

2. The method of claim 1 , wherein the first electro-optic material layer and the second electro-optic material layer include an electro-optic material characterized by a second lattice structure at the cryogenic temperature different from a third lattice structure at the room temperature.

3. The method of claim 2 , wherein the third lattice structure is a same crystal structure as the first lattice structure.

4. The method of claim 1 , wherein annealing the substrate, the seed layer, and the first electro-optic material layer includes annealing at a temperature above a softening temperature of the oxide buffer layer.

5. The method of claim 1 , further comprising:
depositing a second interlayer on the second electro-optic material layer, wherein the second interlayer includes the material that maintains the first lattice structure at the room temperature and the cryogenic temperature;
depositing a third electro-optic material layer on the second interlayer; and
annealing the third electro-optic material layer and the second interlayer.

6. The method of claim 5 , further comprising:
patterning the third electro-optic material layer to form a waveguide core; and
depositing a dielectric cladding layer on the waveguide core.

7. The method of claim 6 , wherein patterning the third electro-optic material layer includes etching the third electro-optic material layer using the second interlayer as an etch stop layer.

8. The method of claim 5 , further comprising forming a waveguide on the third electro-optic material layer.

9. The method of claim 8 , wherein forming the waveguide on the third electro-optic material layer includes:
forming a waveguide core on the third electro-optic material layer; and
depositing a dielectric cladding layer on the waveguide core.

10. The method of claim 8 , wherein forming the waveguide on the third electro-optic material layer includes bonding a wafer including the waveguide to the third electro-optic material layer.

11. The method of claim 8 , further comprising:
etching trenches in the first, second, and third electro-optic material layers and the first and second interlayers; and
filling the trenches with a conductive material.

12. The method of claim 1 , wherein a ratio between a thickness of the first electro-optic material layer and a thickness of the first interlayer is equal to or less than 20:1.

13. A method comprising:
providing a substrate;
forming a first electro-optic material layer on the substrate;
forming a buffer layer between the substrate and the first electro-optic material layer;
cooling the substrate after the forming the buffer layer;
forming a first interlayer on the first electro-optic material layer, wherein the first interlayer includes a material that maintains a first lattice structure at room temperature and a cryogenic temperature;
forming a second electro-optic material layer on the first interlayer; and
annealing the second electro-optic material layer and the first interlayer,
wherein the cooling the substrate after the annealing causes the first electro-optic material layer to be under tensile stress.

14. The method of claim 13 wherein the substrate includes a seed layer and wherein the first electro-optic material layer is deposited on the seed layer.

15. The method of claim 14 wherein the first electro-optic material layer is epitaxially deposited on the seed layer.

16. The method of claim 14 wherein the buffer layer is formed by annealing the substrate, the seed layer and the first electro-optic material layer in an oxygen environment.

17. The method of claim 16 wherein the buffer layer comprises an oxide buffer layer that is formed between the substrate and the seed layer.

18. The method of claim 13 wherein the first electro-optic material layer, the first interlayer, and the second electro-optic material layer are formed using a deposition process.

19. The method of claim 13 wherein the buffer layer relieves stress between the first electro-optic material layer and the substrate.

Assignees

• Psiquantum Corp

Inventors

• Liang Yong
• Thompson Mark G
• Chang Chia-Ming
• Kamineni Vimal Kumar

Classifications

• G02F1/225

  in an optical waveguide structure · CPC title

• G02F1/035 Primary

  in an optical waveguide structure · CPC title

• G02B2006/12142

  Modulator · CPC title

• G02F1/0027

  Ferro-electric materials · CPC title

• G02F1/212

  Mach-Zehnder type · CPC title