Universal output current regulation for a flyback converter

Patent metadata

Field	Value
Publication number	US-11223283-B2
Application number	US-202016853575-A
Country	US
Kind code	B2
Filing date	Apr 20, 2020
Priority date	Apr 20, 2020
Publication date	Jan 11, 2022
Grant date	Jan 11, 2022

Abstract

Disclosed is a universal primary-only output current regulation for a flyback converter. A controller determines a peak sense resistor voltage responsive to a desired average output current for the flyback converter during a continuous conduction mode of operation. After a power switch transistor is cycled on, the controller monitors a sense resistor voltage to determine when the sense resistor voltage equals the peak sense resistor voltage. The controller switches off the power switch transistor when the sense resistor voltage equals the peak sense resistor voltage to maintain an average output current for the flyback converter equal to the desired average output current.

First claim

What is claimed is:

1. A flyback controller for a flyback converter, comprising;
a logic circuit configured to calculate a peak sense resistor voltage for a current switching cycle of a power switch transistor responsive to a desired average output current for the flyback converter during a continuous conduction mode of operation;
a comparator configured to compare the peak sense resistor voltage to a sense resistor voltage; and
a switch driver configured to cycle off the power switch transistor in the current switching cycle responsive to an output signal from the comparator indicating that the sense resistor voltage equals the peak sense resistor voltage to maintain an average output current for the flyback converter equal to the desired average output current.

2. The flyback controller of claim 1 , wherein the logic circuit is a microcontroller.

3. The flyback controller of claim 1 , wherein the logic circuit is further configured to calculate the peak sense resistor voltage responsive to a turns ratio for a transformer in the flyback converter.

4. The flyback controller of claim 1 , wherein the logic circuit is further configured to calculate the peak sense resistor voltage responsive to an input voltage to the flyback converter.

5. The flyback controller of claim 1 , wherein the logic circuit is further configured to calculate the peak sense resistor voltage responsive to an on-time for the power switch transistor in a previous switching cycle.

6. The flyback controller of claim 5 , wherein the logic circuit is further configured to increase the peak sense resistor voltage by a slope compensation offset.

7. The flyback controller of claim 1 , further comprising:
an analog-to-digital converter configured to convert a digital peak sense resistor voltage from the logic circuit to provide an analog peak sense resistor voltage, and wherein the peak sense resistor voltage to the comparator is the analog peak sense resistor voltage.

8. The flyback controller of claim 1 , wherein the logic circuit is further configured to calculate the peak sense resistor voltage responsive to a period for the current switching cycle of the power switch transistor.

9. The flyback controller of claim 3 , further comprising:
a memory for storing the turns ratio and also a magnetizing inductance of the transformer, wherein the logic circuit is further configured to calculate the peak sense resistor voltage responsive to the magnetizing inductance of the transformer.

10. A method of operation for a flyback converter during a continuous conduction mode, comprising:
measuring an on-time for a power switch transistor in a previous switching cycle of the power switch transistor to provide a measured on-time;
switching on the power switch transistor in a current switching cycle of the power switch transistor;
calculating a peak sense resistor voltage responsive to a desired average output current, the measured on-time, an input voltage to the flyback converter, a turns ratio of a transformer in the flyback converter, a magnetizing inductance of the transformer, and a period of the current switching cycle; and
switching off the power switch transistor in the current switching cycle responsive to a sense resistor voltage equaling the peak sense resistor voltage to maintain an average output current for the flyback converter equal to the desired average output current.

11. The method of claim 10 , wherein calculating the peak sense resistor voltage comprises:
forming a first function of the desired average output current, the period, a difference of the period and the measured on-time, the turns ratio, and a sense resistor resistance to provide a first value;
forming a second function of the input voltage, the measured on-time, the magnetizing inductance, and the sense resistor resistance to provide a second value; and
adding the first value and the second value to calculate the peak sense resistor voltage.

12. The method of claim 11 , wherein the first function is a ratio of a first product of the desired average output current, the sense resistor resistance, and the period divided by a second product of the turns ratio and the difference of the period and the measured on-time.

13. The method of claim 11 , wherein the second function is a ratio of a first product of the input voltage, the measured on-time, and the sense resistor resistance divided by twice the magnetizing inductance.

14. The method of claim 10 , further comprising using the method during a discontinuous conduction mode.

15. A flyback converter, comprising:
a transformer including a primary winding;
a power switch transistor connected to the primary winding;
a sense resistor in series with the power switch transistor; and
a controller configured to control a cycling of the power switch transistor so that a sense resistor voltage across the sense resistor in a current cycle of the power switch transistor equals a peak sense resistor voltage that is a function of a desired average output current for the flyback converter, a period for the current cycle of the power switch transistor, an input voltage to the flyback converter, a measured on-time for the power switch transistor in a previous cycle of the power switch transistor, a magnetizing inductance of the transformer, and a turns ratio of the transformer to control an average output current for the flyback converter to equal the desired average output current.

16. The flyback converter of claim 15 , wherein the controller comprises a logic circuit.

17. The flyback converter of claim 16 , wherein the logic circuit is a microcontroller.

18. The flyback converter of claim 15 , wherein the controller further comprises:
a counter configured to count during the previous cycle of the power switch transistor to provide the measured on-time.

19. The flyback converter of claim 18 , wherein the controller further comprises:
a comparator configured to compare the sense resistor voltage to the peak sense resistor voltage, wherein the controller is further configured to cycle off the power switch transistor in the current cycle of the power switch transistor responsive to an output signal from the comparator indicating that the sense resistor voltage equals the peak sense resistor voltage.

20. The flyback converter of claim 19 , further comprising a switch driver for cycling the power switch transistor.

Assignees

• Dialog Semiconductor Inc

Inventors

• Zheng Cong
• Liu Wenduo
• Bui Hien

Classifications

• H02M3/33523 Primary

  with galvanic isolation between input and output of both the power stage and the feedback loop · CPC title

• H02M3/33515 Primary

  with digital control · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title