Display substrate, manufacturing method thereof, and display device

Patent metadata

Field	Value
Publication number	US-11222983-B2
Application number	US-202016825999-A
Country	US
Kind code	B2
Filing date	Mar 20, 2020
Priority date	Jul 30, 2019
Publication date	Jan 11, 2022
Grant date	Jan 11, 2022

Abstract

The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and thin-film transistors disposed on the base substrate, where the thin-film transistors each comprises a gate, an active layer insulated from the gate, and two ohmic contact parts in direct contact with the active layer, leaving a gap region between the two ohmic contact parts; and each of the ohmic contact parts comprises a lightly doped region and a heavily doped region, and an orthographic projection of the lightly doped region on the base substrate and an orthographic projection of the heavily doped region on the base substrate do not overlap each other.

First claim

The invention claimed is:

1. A display substrate, comprising a base substrate and thin-film transistors disposed on the base substrate, wherein
the thin-film transistors each comprises a gate, an active layer insulated from the gate, and two ohmic contact parts in direct contact with the active layer, leaving a gap region between the two ohmic contact parts; and
each of the ohmic contact parts comprises a lightly doped region and a heavily doped region, and an orthographic projection of the lightly doped region on the base substrate and an orthographic projection of the heavily doped region on the base substrate do not overlap each other;
wherein an orthographic projection of the gate on the base substrate and the orthographic projection of the heavily doped region on the base substrate have an overlapping region; and
wherein the lightly doped region comprises a first lightly doped region, and the first lightly doped region is located at a side of the heavily doped region away from a center of the active layer.

2. The display substrate according to claim 1 , wherein an orthographic projection of the first lightly doped region on the base substrate and the orthographic projection of the gate on the base substrate do not overlap each other.

3. The display substrate according to claim 1 , wherein an orthographic projection of the first lightly doped region on the base substrate and the orthographic projection of the gate on the base substrate have an overlapping region.

4. The display substrate according to claim 1 , wherein the lightly doped region further comprises a second lightly doped region, and the second lightly doped region is located at a side of the heavily doped region close to the center of the active layer.

5. The display substrate according to claim 4 , wherein a doping concentration of the first lightly doped region is same as that of the second lightly doped region.

6. The display substrate according to claim 1 , wherein the thin-film transistors each further comprises a source and a drain;
an orthographic projection of the source on the base substrate covers an orthographic projection of one of the ohmic contact parts on the base substrate, and the source is in direct contact with the one of the ohmic contact parts; and
an orthographic projection of the drain on the base substrate covers an orthographic projection of another one of the ohmic contact parts on the base substrate, and the drain is in direct contact with the another one of the ohmic contact parts.

7. The display substrate according to claim 1 , wherein the two ohmic contact parts in each of the thin-film transistors are symmetrically disposed with respect to a center of the active layer.

8. The display substrate according to claim 1 , wherein the ohmic contact parts are made of an N-type semiconductor material.

9. A display device, comprising the display substrate of claim 1 .

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Ma Tao
• Wang Yunlong
• Yang Chengshao
• Ji Yu
• Liu Shengli

Classifications

• H10D30/0321

  comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

• H10D86/421

  having a particular composition, shape or crystalline structure of the active layer · CPC title

• H10D86/0221

  comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D30/0316

  of lateral bottom-gate TFTs comprising only a single gate · CPC title