System and method for depicting and using one logical connection with collection of input/output (I/O) modules as multiple individual logical connections

Patent metadata

Field	Value
Publication number	US-11221606-B2
Application number	US-201816045380-A
Country	US
Kind code	B2
Filing date	Jul 25, 2018
Priority date	Sep 26, 2017
Publication date	Jan 11, 2022
Grant date	Jan 11, 2022

Abstract

A method includes presenting a graphical user interface to a user, where the graphical user interface identifies multiple slots that are configured to be coupled to multiple input/output (I/O) modules. The method also includes receiving, from the user via the graphical user interface, information defining a slot assembly data map. The slot assembly data map identifies data offsets and data sizes associated with the I/O modules. The data offsets and the data sizes identify where data can be sent to or received from the multiple I/O modules over a single logical connection. The method further includes using the data offsets and the data sizes of the slot assembly data map to provide data to or receive data from one or more of the I/O modules over the single logical connection.

First claim

What is claimed is:

1. A method for depicting and using a single logical connection with multiple input/output (I/O) modules in an industrial process control and automation system comprising:
presenting a graphical user interface to a user, the graphical user interface identifying multiple slots that are configured to be coupled to the multiple input/output (I/O) modules;
allowing, using an adapter tool, one or more users to define a generic adapter representation of a head end module and a slot assembly data map for the multiple I/O modules;
receiving, from the user via the graphical user interface, information defining a slot assembly data map, the slot assembly data map identifying data offsets and data sizes associated with the I/O modules, the data offsets and the data sizes identifying where data can be sent to or received from the multiple I/O modules over the single logical connection, wherein the slot assembly data map provides information defining how data is parsed automatically during runtime in order to communicate with the different I/O modules over the single logical connection; and
using, by the generic adaptor representation, the slot assembly data map to define logical representations of the I/O modules in a rack or other collection;
using the data offsets and the data sizes of the slot assembly data map to provide data to or receive data from one or more of the I/O modules over the single logical connection;
identifying status or other diagnostic information for one or more of the I/O modules using the slot assembly data map; and
receiving information defining an update to the slot assembly data map,
wherein the update is associated with a replacement of one or more of the I/O modules, a reordering of two or more of the I/O modules, or a firmware update of one or more of the I/O modules that changes at least one of the data offsets or at least one of the data sizes, and
wherein the adaptor tool is configured to obtain data from the one or more users defining how slot status processing occurs, which allows one or more controllers or other devices to identify diagnostic information for each I/O module received over the single logical connection.

2. The method of claim 1 , further comprising:
receiving, from the user via the graphical user interface, information defining a slot status assembly map, the slot status assembly map identifying additional data offsets associated with the I/O modules, the additional data offsets identifying where diagnostic data can be received from the multiple I/O modules over the single logical connection; and
using the additional data offsets of the slot status assembly map to obtain diagnostic data from at least one of the I/O modules over the single logical connection.

3. The method of claim 1 , wherein the slot assembly data map defines a split of data from a single device across two or more software representations of the I/O modules.

4. The method of claim 1 , wherein:
using the data offsets and the data sizes of the slot assembly data map comprises using the slot assembly data map to provide or receive data associated with a consolidated configuration assembly, a consolidated input assembly, and a consolidated output assembly;
the consolidated configuration assembly comprises data defining a configuration of a collection of the I/O modules;
the consolidated input assembly comprises data produced by the collection of the I/O modules; and
the consolidated output assembly comprises data consumed by the collection of the I/O modules.

5. The method of claim 1 , further comprising:
generating a second graphical user interface containing logical representations of the I/O modules;
wherein the logical representations of the I/O modules comprise a common representation, regardless of one or more types of connections between the I/O modules and an industrial process controller.

6. The method of claim 1 , wherein the single logical connection communicatively couples a head end module of an I/O module assembly to an industrial process controller, the head end module configured to communicate with the I/O modules through a backplane comprising the slots.

7. An apparatus for depicting and using a single logical connection with multiple input/output (I/O) modules in an industrial process control and automation system comprising:
at least one processing device configured to:
generate a graphical user interface for presentation to a user, the graphical user interface identifying multiple slots that are configured to be coupled to the multiple input/output (I/O) modules;
allow, using an adapter tool, one or more users to define a generic adapter representation of a head end module and a slot assembly data map for the multiple I/O modules;
receive, from the user via the graphical user interface, information defining a slot assembly data map, the slot assembly data map identifying data offsets and data sizes associated with the I/O modules, the data offsets and the data sizes identifying where data can be sent to or received from the multiple I/O modules over the single logical connection, wherein the slot assembly data map provides information defining how data is parsed automatically during runtime in order to communicate with the different I/O modules over the single logical connection; and
use, by the generic adaptor representation, the slot assembly data map to define logical representations of the I/O modules in a rack or other collection;
use the data offsets and the data sizes of the slot assembly data map to provide data to or receive data from one or more of the I/O modules over the single logical connection;
identify status or other diagnostic information for one or more of the I/O modules using the slot assembly data map; and
receiving information defining an update to the slot assembly data map,
wherein the update is associated with a replacement of one or more of the I/O modules, a reordering of two or more of the I/O modules, or a firmware update of one or more of the I/O modules that changes at least one of the data offsets or at least one of the data sizes, and

wherein the adaptor tool is configured to obtain data from the one or more users defining how slot status processing occurs, which allows one or more controllers or other devices to identify diagnostic information for each I/O module received over the single logical connection.

8. The apparatus of claim 7 , wherein the at least one processing device is further configured to:
receive, from the user via the graphical user interface, information defining a slot status assembly map, the slot status assembly map identifying additional data offsets associated with the I/O modules, the additional data offsets identifying where diagnostic data can be received from the multiple I/O modules over the single logical connection; and
use the additional data offsets of the slot status assembly map to obtain diagnostic data from at least one of the I/O modules over the single logical connection.

9. The apparatus of claim 7 , wherein:
the at least one processing device is configured to use the data offsets and the data sizes of the slot assembly data map to provide or receive data associated with a consolidated configuration assembly, a consolidated input assembly, and a consolidated output assembly;
the consolidated configuration assembly comprises data defining a configuration of a collection of the I/O modules;
the consolidated input assembly comprises data produced by the collection of the I/O modules; and
the consolidated output assembly comprises data consumed by the collection of the I/O modules.

10. The apparatus of claim 7 , wherein:
the at least one processing device is further

Assignees

• Honeywell Int Inc

Inventors

• Prakash Suraj
• Gupta Sameer
• Paruchuri Laxmana Rao

Classifications

• G06F8/65

  Updates (security arrangements therefor G06F21/57) · CPC title

• G06F9/44505

  Configuring for program initiating, e.g. using registry, configuration files · CPC title

• G06F9/451

  Execution arrangements for user interfaces · CPC title

• G06F9/453

  Help systems · CPC title

• G05B19/0423 Primary

  Input/output · CPC title