Semiconductor device package
US-9263563-B2 · Feb 16, 2016 · US
US11217510B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11217510-B2 |
| Application number | US-201715825486-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 29, 2017 |
| Priority date | Nov 29, 2016 |
| Publication date | Jan 4, 2022 |
| Grant date | Jan 4, 2022 |
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Official abstract text for this publication.
A semiconductor device forming a bidirectional switch includes a carrier, first and second semiconductor elements arranged on the carrier, a first row of terminals arranged along a first side face of the carrier, a second row of terminals arranged along a second side face of the carrier opposite the first side face, and an encapsulation body encapsulating the first and second semiconductor elements. Each row of terminals includes a gate terminal, a sensing terminal and at least one power terminal of the bidirectional switch.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device forming a bidirectional switch, the semiconductor device comprising: a carrier; a first semiconductor chip and a second semiconductor chip arranged on the same carrier; a first row of terminals arranged along a first side face of the carrier; a second row of terminals arranged along a second side face of the carrier opposite the first side face; and an encapsulation body encapsulating the first and the second semiconductor chips, wherein the first semiconductor chip comprises a first transistor structure comprising first source, drain and gate electrodes, wherein the second semiconductor chip comprises a second transistor structure comprising second source, drain and gate electrodes, wherein the drain electrode of the first semiconductor chip and the drain electrode of the second semiconductor chip are connected to the same carrier such that the first and the second transistor structures are only electrically coupled by the respective first and second drain electrodes via the carrier, wherein the first row of terminals comprises a first gate terminal coupled with the first gate electrode, a first sensing terminal coupled with the first source electrode, and a first power terminal of the bidirectional switch coupled with the first source electrode, wherein the second row of terminals comprises a second gate terminal coupled with the second gate electrode, a second sensing terminal coupled with the second source electrode, and a second power terminal of the bidirectional switch coupled with the second source electrode, wherein the carrier and the first and the second rows of terminals are parts of a leadframe. 2. The semiconductor device of claim 1 , wherein the first and the second semiconductor chips are implemented monolithically. 3. The semiconductor device of claim 1 , wherein the first and the second semiconductor chips are identical semiconductor chips. 4. The semiconductor device of claim 1 , wherein the first and the second semiconductor chips are arranged on a first main face of the carrier, and wherein a second main face of the carrier opposite the first main face is exposed from the encapsulation body. 5. The semiconductor device of claim 1 , wherein the first and the second rows of terminals are physically separated from the carrier. 6. The semiconductor device of claim 1 , wherein the first and the second semiconductor chips are soldered to the same carrier, and wherein the first and the second semiconductor chips are laterally spaced apart by a distance such that solder bleed-out of a first solder deposit for the first semiconductor chip does not commingle with solder bleed-out of a second solder deposit for the second semiconductor chip.
between a chip and a laterally-adjacent insulating package substrate, interpose or RDL · CPC title
between laterally-adjacent chips · CPC title
by a substrate and the encapsulations · CPC title
the semiconductor body being completely enclosed · CPC title
multiple bond wires connected to common bond pads at both ends of the wires · CPC title
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