Pixel circuit, driving method thereof and display device

US11217172B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11217172-B2
Application numberUS-201916622637-A
CountryUS
Kind codeB2
Filing dateMay 31, 2019
Priority dateMay 31, 2018
Publication dateJan 4, 2022
Grant dateJan 4, 2022

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A pixel circuit and driving method thereof, a display device are provided, and the pixel circuit includes a switching sub-circuit, a threshold voltage extraction sub-circuit, an initialization sub-circuit, a feedback compensation sub-circuit, a driving transistor and a light emitting device. The threshold voltage extraction sub-circuit is coupled to a control electrode of the driving transistor, and configured to extract and store a threshold voltage of the driving transistor in response to an enable signal and configured to apply the threshold voltage and a data voltage written by the switching sub-circuit to the control electrode of the driving transistor. The feedback compensation sub-circuit is coupled to a second terminal of the light emitting device and a data line, and configured to generate a data voltage compensation signal for a next display image frame according to an operating current of the light emitting device and supply it to the data line. (FIG. 1).

First claim

Opening claim text (preview).

What is claimed is: 1. A pixel circuit, comprising: a switching sub-circuit, a threshold voltage extraction sub-circuit, an initialization sub-circuit, a feedback compensation sub-circuit, a driving transistor and a light emitting device; wherein, a first electrode of the driving transistor is supplied with a power supply voltage, a second electrode of the driving transistor is coupled to a first terminal of the light emitting device; the initialization sub-circuit is coupled to a control electrode of the driving transistor, and is configured to input a reference voltage to the control electrode of the driving transistor in response to an enable signal, so that the first terminal of the light emitting device is discharged by the driving transistor; the switching sub-circuit is coupled to the threshold voltage extraction sub-circuit and a data line, and is configured to write a data voltage input by the data line to the threshold voltage extraction sub-circuit in response to a scan signal; the threshold voltage extraction sub-circuit is coupled to the control electrode of the driving transistor, is configured to extract and store a threshold voltage of the driving transistor in response to the enable signal, and configured to apply the threshold voltage and the data voltage written by the switching sub-circuit to the control electrode of the driving transistor, so that the driving transistor inputs the data voltage to the light emitting device to drive the light emitting device to emit light; and the feedback compensation sub-circuit is coupled to a second terminal of the light emitting device and the data line, is configured to generate a data voltage compensation signal for a next display image frame according to an operating current flowing through the light emitting device and supply the generated data voltage compensation signal to the data line; wherein the feedback compensation sub-circuit is configured to determine whether the operating current of the light emitting device changes, in response to the operating current of the light emitting device increasing, the feedback compensation sub-circuit outputs the data voltage compensation signal with negative value to the data line, in response to the operating current of the light emitting device decreasing, the feedback compensation sub-circuit outputs the data voltage compensation signal with a positive value to the data line; and wherein the feedback compensation sub-circuit comprises a first resistor, a second resistor, a feedback resistor, a first comparator, a second comparator and a third storage capacitor; a first terminal of the first resistor is coupled to the second terminal of the light emitting device and a positive input terminal of the first comparator, and a second terminal of the first resistor is coupled to a ground electrode; a negative input terminal of the first comparator is coupled to a second terminal of the third storage capacitor and an output terminal of the second comparator; and output terminal of the first comparator is coupled to a positive input terminal of the second comparator; a first terminal of the second resistor is coupled to a negative input terminal of the second comparator, and a second terminal of the second resistor is supplied with the power supply voltage; a first terminal of the feedback resistor is coupled to the output terminal of the second comparator, and a second terminal of the feedback resistor is coupled to the negative input terminal of the second comparator; and a first terminal of the third storage capacitor is coupled to a data line, and is configured to store the data voltage compensation signal and provide it to the data line. 2. The pixel circuit according to claim 1 , wherein the initialization sub-circuit comprises a second transistor; and a first electrode of the second transistor is supplied with the reference voltage, a second electrode of the second transistor is coupled to the control electrode of the driving transistor, and a control electrode of the second transistor is supplied with the enable signal. 3. The pixel circuit according to claim 1 , wherein the threshold voltage extraction sub-circuit comprises a fourth transistor, a first storage capacitor and a second storage capacitor; a first electrode of the fourth transistor is coupled to a first terminal of the first storage capacitor, a second electrode of the fourth transistor is coupled to a first terminal of the light emitting device, and a control electrode of the fourth transistor is supplied with the enable signal; a second terminal of the first storage capacitor is coupled to the control electrode of the driving transistor; and a first terminal of the second storage capacitor is coupled to the first terminal of the first storage capacitor, and a second terminal of the second storage capacitor is supplied with the reference voltage. 4. The pixel circuit according to claim 3 , wherein the switching sub-circuit comprises a third transistor; and a first electrode of the third transistor is coupled to the data line, a second electrode of the third transistor is coupled to the first terminal of the first storage capacitor, and a control electrode of the third transistor is supplied with the scan signal. 5. The pixel circuit according to claim 4 , further comprising a de-noising sub-circuit; wherein the de-noising sub-circuit is coupled to a reset signal terminal and a ground terminal and is configured to input a ground voltage to the first terminal of the light emitting device to de-noise a potential of the first terminal of the light emitting device under a control of a reset signal input by the reset signal terminal. 6. The pixel circuit according to claim 5 , wherein the de-noising sub-circuit comprises a fifth transistor; and a first electrode of the fifth transistor is coupled to the first terminal of the light emitting device, a second electrode of the fifth transistor is coupled to the ground electrode, and a control electrode of the fifth transistor is coupled to the reset signal terminal. 7. The pixel circuit according to claim 6 , wherein an impedance of the fifth transistor is greater than an impedance of the driving transistor. 8. The pixel circuit according to claim 5 , wherein the de-noising sub-circuit comprises a fifth transistor; and a first electrode of the fifth transistor is coupled to the first terminal of the light emitting device, a second electrode of the fifth transistor is coupled to the ground electrode, and a control electrode of the fifth transistor is supplied with the enable signal. 9. The pixel circuit according to claim 8 , wherein an impedance of the fifth transistor is greater than an impedance of the driving transistor. 10. A display device, comprising the pixel circuit of claim 1 . 11. A driving method for a pixel circuit of claim 1 , the driving method comprises: in an initialization stage, inputting, by the initialization sub-circuit, a reference voltage to a control electrode of the driving transistor in response to an enable signal such that a first terminal of the light emitting device is discharged by the driving transistor; in a threshold voltage extraction stage, extracting and storing, by the threshold voltage extraction sub-circuit, a threshold voltage of the driving transistor in response to the enable signal; in a data writing stage, inputting, by the switching sub-circuit, a data voltage provided by a data line, to the threshold voltage extraction sub-circuit in response to a scan signal such that the threshold voltage extraction sub-circuit applies the threshold voltage of the driving transistor and the data voltage input by the switching sub-circ

Assignees

Inventors

Classifications

  • in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements · CPC title

  • forming a linear amplifier or follower · CPC title

  • G09G3/3233Primary

    with pixel circuitry controlling the current through the light-emitting element · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

  • Details of drivers for scan electrodes · CPC title

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What does patent US11217172B2 cover?
A pixel circuit and driving method thereof, a display device are provided, and the pixel circuit includes a switching sub-circuit, a threshold voltage extraction sub-circuit, an initialization sub-circuit, a feedback compensation sub-circuit, a driving transistor and a light emitting device. The threshold voltage extraction sub-circuit is coupled to a control electrode of the driving transistor…
Who is the assignee on this patent?
Hefei Boe Optoelectronics Tech, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 04 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).