Array substrate, electronic paper display panel and drive method thereof and display device

Patent metadata

Field	Value
Publication number	US-11215897-B2
Application number	US-201816188528-A
Country	US
Kind code	B2
Filing date	Nov 13, 2018
Priority date	Jun 21, 2018
Publication date	Jan 4, 2022
Grant date	Jan 4, 2022

Abstract

Provided are an array substrate, an electronic paper display panel and a drive method thereof and a display device. A display area includes a plurality of sub-display areas, a plurality of data lines in each sub-display area are electrically insulated from each other, corresponding data lines in different sub-display areas are electrically connected to each other, and a control signal line is configured to control display time of each sub-display area. When a control chip and a flexible circuit board are employed, only a small number of control chips and flexible circuit boards may drive the plurality of sub-display areas to display pictures.

First claim

What is claimed is:

1. An array substrate, comprising: a display area and a non-display area, wherein the display area comprises a plurality of sub-display areas, the display area comprises a plurality of scanning lines, each of the plurality of sub-display areas comprises a plurality of data lines, and the plurality of data lines are intersected with the plurality of scanning lines to form a plurality of sub-pixels; wherein
in the display area, sub-pixels in a same row are electrically connected to a same scanning line; wherein
in each of the plurality of sub-display area, sub-pixels in a same column are electrically connected to a same data line; wherein
the plurality of data lines in each of the plurality of sub-display area comprise data lines numbered from a first data line to an Nth data line, the plurality of data lines in each of the plurality of sub-display areas are electrically insulated from each other, data lines having a same data line number in different sub-display areas are electrically connected to each other, where N is an integer larger than or equal to 3; wherein
the array substrate further comprises at least two control signal lines and a plurality of connection lines, the plurality of sub-pixels in each of the plurality of sub-display areas are electrically connected to a same control signal line, and sub-pixels in different sub-display areas are electrically connected to different control signal lines;
the data lines having a same data line number in the different sub-display areas are electrically connected to each other through one of the plurality of connection lines; and
wherein the array substrate further comprises a first metal layer, a second metal layer and a third metal layer which are sequentially stacked, the plurality of scanning lines are formed in the first metal layer, the plurality of data lines in the plurality of sub-display areas are formed in the second metal layer, and the plurality of connection lines are formed in the third metal layer.

2. The array substrate according to claim 1 , wherein the plurality of connection lines are disposed in the display area.

3. The array substrate according to claim 1 , wherein the plurality of data lines in the plurality of sub-display areas are extended along a column direction and the plurality of scanning lines are extended along a row direction;
wherein the non-display area is located at one end of the array substrate in the column direction, and the non-display area further comprises a control signal pin, and each of the plurality of sub-pixels is electrically connected to the control signal pin through the at least two control signal lines; and wherein
each of the at least two control signal lines comprises a main line extending along the column direction and a plurality of sublines extending along the row direction, each of the plurality of sub-pixels is electrically connected to the main line through one of the plurality of subline, and the main line of each of the at least two control signal lines is extended from the display area to the non-display area.

4. The array substrate according to claim 3 , wherein main lines of the at least two control signal lines are disposed in the second metal layer and sublines of the at least two control signal lines are disposed in the third metal layer.

5. The array substrate according to claim 1 , wherein the plurality of data lines in the plurality of sub-display areas are extended along a column direction and the plurality of scanning lines are extended along a row direction; wherein
the non-display area is located at one end of the array substrate in the column direction and the non-display area further comprises a scanning signal pin; and wherein
the array substrate further comprises a plurality of scanning signal lead wires extending along the column direction, each of the plurality of scanning lines is electrically connected to the scanning signal pin through a respective one of the plurality of scanning signal lead wires, and the plurality of scanning signal lead wires are extended from the display area to the non-display area.

6. The array substrate according to claim 5 , wherein the scanning signal lead wires are disposed in the second metal layer.

7. The array substrate according to claim 1 , wherein each of the plurality of sub-pixels further comprises a pixel drive module and a pixel electrode, and in each of the sub-pixels:
a control signal input terminal of the pixel drive module is electrically connected to a respective one of the at least two control signal lines,
a scanning signal input terminal of the pixel drive module is electrically connected to a respective one of the plurality of scanning lines,
a data signal input terminal of the pixel drive module is electrically connected to a respective one of the plurality of data lines, and
a data signal output terminal of the pixel drive module is electrically connected to the pixel electrode.

8. The array substrate according to claim 7 , wherein the pixel drive module comprises a first transistor and a second transistor, wherein a first electrode of the first transistor is electrically connected to the respective of the data lines, a second electrode of the first transistor is electrically connected to the first electrode of the second transistor, and a second electrode of the second transistor is electrically connected to the pixel electrode; wherein
a control terminal of the first transistor is electrically connected to the respective one of the plurality of scanning lines, and a control terminal of the second transistor is electrically connected to the respective one of the at least two control signal lines; or
the control terminal of the first transistor is electrically connected to the respective one of the at least two control signal lines, and the control terminal of the second transistor is electrically connected to the respective one of the plurality of scanning lines.

9. The array substrate according to claim 7 , wherein the first transistor and the second transistor are low temperature polysilicon thin film transistors.

10. The array substrate according to claim 1 , wherein the plurality of sub-display areas are arranged in the row direction, wherein the array substrate further comprises a control chip disposed in the non-display area and disposed below one of the plurality of sub-display areas.

11. The array substrate according to claim 1 , wherein the plurality of sub-display areas are arranged in the row direction, and the array substrate further comprises a control chip disposed in the non-display area and disposed at one end of the array substrate in the row direction.

12. An electronic paper display panel, comprising the array substrate according to claim 1 , an electrophoretic film and a common electrode layer;
wherein the electrophoretic film is disposed between the common electrode layer and the array substrate, and the plurality of sub-display areas are covered by the electrophoretic film.

13. A method for driving an electronic paper display panel, wherein the electronic paper display panel comprises an array substrate, wherein the array substrate comprises a display area and a non-display area, the display area comprises a plurality of sub-display areas, the display area comprises a plurality of scanning lines, each of the sub-display areas comprises a plurality of data lines, and the plurality of data lines are intersected with the plurality of scanning lines to form a plurality of sub-pixels; wherein
in each of the plurality of sub-display areas, sub-pixels in a same column are electrically connected to a same data line;
in the display

Assignees

• Shanghai Tianma Micro Elect Co

Inventors

• Xu Zuzhao
• Xi Kerui
• Lin Baiquan
• Li Xiaohe
• Liu Jine
• Qin Feng
• Mao Qiongqin
• Wang Tinghai
• Zhang Mingwei

Classifications

• G09G3/344

  based on particles moving in a fluid or in a gas, e.g. electrophoretic devices (electrophoretic devices per se G02F1/167) · CPC title

• G09G2380/02

  Flexible displays · CPC title

• G02F1/16766

  for active matrices · CPC title

• G02F1/1685 Primary

  Operation of cells; Circuit arrangements affecting the entire cell · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title