Probe card assembly in automated test equipment

Patent metadata

Field	Value
Publication number	US-11215641-B2
Application number	US-201916726649-A
Country	US
Kind code	B2
Filing date	Dec 24, 2019
Priority date	Dec 24, 2019
Publication date	Jan 4, 2022
Grant date	Jan 4, 2022

Abstract

Probe pin arrangements in a vertical-type probe card assembly for an automated test equipment (ATE) are disclosed. In some embodiments, one or more additional conductive regions are provided in between adjacent probe pins. The additional conductive regions may reduce spacing between probe pins connected to adjacent probe card pads, and may in turn reduce or adjust inductance between the two probe cards pads to provide improved signal impedance matching or lower power impedance. In one embodiment, the additional conductive region is a short probe pin. In another embodiment, the additional conductive region is a protrusion on a vertical probe pin.

First claim

What is claimed is:

1. A probe card assembly for testing a wafer having a plurality of wafer pads, the probe card assembly comprising:
a board having a plurality of probe card pads on a surface;
a first probe pin comprising a first conductive region in contact with a first probe card pad of the plurality of probe card pads and extending in a first direction perpendicular to the surface, the first probe pin configured to contact a wafer pad;
a second conductive region adjacent the first conductive region and electrically connected to the first probe card pad, wherein the second conductive region is configured to be separated from the wafer pad by a dielectric material when the probe pin contacts the wafer pad.

2. The probe card assembly of claim 1 , wherein:
the second conductive region comprises a first end in contact with the probe card pad.

3. The probe card assembly of claim 2 , wherein the second conductive region is a second probe pin shorter in length than the first probe pin, and wherein
the first probe pin comprises a needle configured to contact the wafer pad, and
the second probe pin comprises a second end configured to face the wafer pad and be separated from the wafer pad by the dielectric material.

4. The probe card assembly of claim 3 , further comprising a bridge connecting the second end of the second probe pin to the first probe pin.

5. The probe card assembly of claim 3 , further comprising a guide plate having a first hole and a second hole, wherein the first probe pin is disposed in the first hole and the second probe pin is disposed in the second hole.

6. The probe card assembly of claim 5 , wherein
the second hole is partially-filled with the dielectric material such that the second end of the second probe pin abuts the dielectric material in the second hole.

7. The probe card assembly of claim 6 , wherein the guide plate comprises the dielectric material.

8. The probe card assembly of claim 2 , wherein the second conductive region is arranged such that a projection of the second conductive region on a surface of the wafer along a direction perpendicular to the surface of the wafer is at least partially outside a boundary of the wafer pad.

9. The probe card assembly of claim 1 , wherein the second conductive region is a protrusion on the first probe pin in a second direction parallel to the surface of the board.

10. The probe card assembly of claim 9 , wherein the first probe pin has a needle configured to contact the wafer pad, and wherein the needle has a diameter that is smaller than a width of the protrusion along the second direction.

11. The probe card assembly of claim 10 , further comprising a guide plate having a through-hole which the first probe pin is disposed therein, wherein the through-hole comprises a shape that conforms to a shape of the protrusion.

12. The probe card assembly of claim 11 , wherein a cross section of the shape of the protrusion along a plane parallel to the first direction is rectangular, and wherein the protrusion comprises a planar surface facing away from the surface of the board and configured to be separated from the wafer pad by a dielectric material when the first probe pin contacts the wafer pad.

13. A probe card assembly for testing a wafer having a plurality of wafer pads, the probe card assembly comprising:
a board having a plurality of probe card pads on a surface;
a plurality of probe pins extending through a substrate along a first direction perpendicular to the surface;
a first probe pin of the plurality of probe pins in contact with a first probe card pad of the plurality of probe card pads, and having a needle configured to contact a first wafer pad of the plurality of wafer pads,
a second probe pin of the plurality of probe pins adjacent the first probe pin, wherein the second probe pin is in contact with a second probe card pad of the plurality of probe card pads, and has a needle configured to contact a second wafer pad of the plurality of wafer pads;
a conductive region adjacent the first probe pin, the conductive region electrically connected to the first probe card pad, and configured to be separated from the first wafer pad by a dielectric material when the first probe pin contacts the first wafer pad.

14. The probe card assembly of claim 13 , wherein the conductive region is disposed in the substrate between the first and second probe pins, and wherein a nearest distance between the conductive region and the second probe pin is less than 50 μm.

15. The probe card assembly of claim 13 , wherein
the conductive region is a third probe pin shorter in length than the first probe pin, the third probe pin comprising a first end in contact with the first probe card pad, and a second end configured to face the first wafer pad and be separated from the first wafer pad by the dielectric material.

16. The probe card assembly of claim 13 , wherein the conductive region is a protrusion on the first probe pin in a second direction parallel to the surface of the board.

17. The probe card assembly of claim 13 , wherein the substrate is a guide plate having a first hole and a second hole, wherein the first probe pin is disposed in the first hole and the second probe pin is disposed in the second hole.

18. The probe card assembly of claim 13 , wherein the second probe card pad is a signal pad, the first probe card pad is a ground pad, and wherein the first probe card pad has a larger area than the second probe card pad.

19. The probe card assembly of claim 13 , wherein an inductance between the first probe card pad and the first wafer pad is smaller than an inductance between the first probe card pad and the first wafer pad without the conductive region.

20. The probe card assembly of claim 13 , wherein the conductive region is a first conductive region, and the probe card further comprises:
a second conductive region adjacent the second probe pin and electrically connected to the second probe card pad, wherein the second conductive region is configured to be separated from the second wafer pad by the dielectric material when the second probe pin contacts the second wafer pad, and wherein
the second conductive region is disposed in the substrate between the second probe pin and the first conductive region.

21. The probe card assembly of claim 20 , wherein the first probe card pad is a ground pad, and the second probe card pad is a power pad.

22. An interposer for an automated test equipment (ATE), comprising:
a substrate having a first surface and a second surface offset in a first direction from the first surface;
a plurality of spring pins within the substrate and elongated in the first direction;
a first portion of the plurality of spring pins comprising a first inductance;
a second portion of the plurality of spring pins comprising a second inductance higher than the first inductance, wherein
the first portion comprises a conductive region separated from the first surface by a dielectric material.

23. The interposer of claim 22 , wherein the conductive region is a short pin that is shorter in length than an adjacent spring pin of the plurality of spring pins, wherein the short pin comprises a first end separated from the first surface of the substrate by the dielectric material, and a second end exposed from the second surface and coplanar with an end of each of the first portion of plurality of spring pins.

24. The interposer of claim 22 , wherein th

Assignees

• Teradyne Inc

Inventors

• Brecht Brian

Classifications

• G01R31/2834

  Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title

• G01R1/07378 Primary

  using an intermediate adapter, e.g. space transformers (G01R1/07371 takes precedence) · CPC title

• G01R1/07342 Primary

  the body of the probe being at an angle other than perpendicular to test object, e.g. probe card · CPC title

• G01R1/07314

  the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support (on an elastic support, e.g. a film, G01R1/0735) · CPC title