Image sensor and method for controlling same

Patent metadata

Field	Value
Publication number	US-11212475-B2
Application number	US-202016890944-A
Country	US
Kind code	B2
Filing date	Jun 2, 2020
Priority date	Jun 3, 2019
Publication date	Dec 28, 2021
Grant date	Dec 28, 2021

Abstract

A sensor includes pixels each including: a first transistor and a first switch in series between a first node and an internal node of the pixel, a gate of the first transistor being coupled to a second node; a capacitive element, a first terminal of which is connected to the second node; and a plurality of assemblies each including a capacitance in series with a second switch coupled to the internal node. The sensor includes a circuit configured to control, each time a voltage is stored in one of the assemblies, the interruption of a current between the first node and the internal node: by switching a first potential applied to a second terminal of the capacitive element; or by opening the first switch.

First claim

The invention claimed is:

1. An image sensor comprising:
a matrix of pixels, each including:
a first transistor and a first switch that are connected in series between a first node, configured to receive a first potential, and an internal node of the pixel, the first transistor having a gate coupled to a floating diffusion node of the pixel;
a capacitive element having a first terminal connected to the floating diffusion node of the pixel; and
a plurality of assemblies, each including a capacitance and a second switch connected in series with the capacitance and coupling the capacitance to the internal node of the pixel; and

a control circuit configured to enable a voltage to be stored in a selected assembly of the assemblies of one of the pixels by closing the second switch of the selected assembly, and control an interruption of a current circulating between the first node and the internal node of the pixel, while the second switch of the selected assembly is closed, by:
controlling a switching, from a first level to a second level, of a second potential applied to a second terminal of the capacitive element of the pixel; or
controlling an opening of the first switch of the pixel.

2. The sensor according to claim 1 , wherein, in each of the pixels, a source of the first transistor is not coupled to a constant-bias current source.

3. The sensor according to claim 1 , wherein the control circuit is configured, while enabling to store the voltage in the selected assembly, to control a switching of the first potential applied to the first node, from a third level to a fourth level before the interruption of the current.

4. The sensor according to claim 3 , wherein the control circuit is configured, while enabling to store the voltage in the selected assembly, to separate, by a duration, the control of the interruption of the current from the control of the switching, from the third to the fourth level, of the first potential applied to the first node, the duration being identical irrespective of the pixel and the selected assembly.

5. The sensor according to claim 3 , wherein the control circuit is configured, while enabling to store the voltage in the selected assembly, to maintain the fourth level of the first potential applied to the first node, at least until the interruption of the current.

6. The sensor according to claim 3 , wherein the control circuit is configured, to control an opening of the second switch of the selected assembly after the interruption of the current, and to maintain the fourth level of the first potential applied to the first node at least until the opening of the second switch.

7. The sensor according to claim 3 , wherein the control circuit is configured to enable the voltage to be stored in the selected assembly by keeping closed the first switch of the pixel and the second switch of the selected assembly before controlling the switching, from the third to the fourth level, of the first potential applied to the first node.

8. The sensor according to claim 1 , wherein the control circuit is configured to enable the voltage to be stored in the selected assembly by keeping closed the first switch of the pixel and the second switch of the selected assembly, at least until the interruption of the current.

9. A method, comprising:
controlling an image sensor that includes a matrix of pixels, each including:
a first transistor and a first switch that are connected in series between a first node, configured to receive a first potential, and an internal node of the pixel, the first transistor having a gate coupled to a floating diffusion node of the pixel;
a capacitive element having a first terminal connected to the floating diffusion node of the pixel; and
a plurality of assemblies, each including a capacitance and a second switch connected in series with the capacitance and coupling the capacitance to the internal node of the pixel, the controlling including:
enabling a voltage to be stored in a selected assembly of the plurality of assemblies of one of the pixels by closing the second switch of the selected assembly;
controlling, while the second switch of the selected assembly is closed, an interruption of a current circulating between the first node and the internal node of the pixel, by:
controlling a switching, from a first level to a second level, of a second potential applied to a second terminal of the capacitive element of the pixel; or
controlling an opening of the first switch of the pixel.

10. The method according to claim 9 , wherein, in each of the pixels, a source of the first transistor is not coupled to a constant-bias current source.

11. The method according to claim 9 , wherein the storing comprises controlling a switching of the first potential applied to the first node from a third level to a fourth level before the interruption of the current.

12. The method according to claim 11 , comprising keeping the first potential applied to the first node at the fourth level, at least until the interruption of the current.

13. The method according to claim 11 , comprising:
opening the second switch of the selected assembly after the interruption of the current,
keeping the first potential applied to the first node at the fourth level at least until opening the second switch.

14. The method according to claim 11 , comprising:
keeping closed the first switch of the pixel and the second switch of the selected assembly before the switching, from the third to the fourth level, of the first potential applied to the first node.

15. The method according to claim 9 , comprising:
enabling respective voltages to be stored in respective selected assemblies of the plurality of assemblies of the plurality of pixels, by closing the second switch of each of the selected assemblies;
for each pixel of the plurality of pixels, controlling, while the second switch of the selected assembly of the pixel is closed, an interruption of a current circulating between the first node and the internal node of the pixel; and
for each pixel of the plurality of pixels, controlling a switching of the first potential applied to the first node of the pixel from a third level to a fourth level before the interruption of the current, wherein, for each pixel, an identical duration separates controlling the interruption of the current from controlling the switching, from the third level to the fourth level, of the potential applied to the first node of the pixel.

16. The method according to claim 9 , wherein the storing includes keeping closed the first switch of the pixel and the second switch of the selected assembly at least until the interruption of the current.

17. An image sensor comprising:
a matrix of pixels, each including:
a first transistor and a first switch that are connected in series between a first node, configured to receive a first potential, and an internal node of the pixel, the first transistor having a gate coupled to a floating diffusion node of the pixel;
a capacitive element having a first terminal connected to the floating diffusion node of the pixel; and
a plurality of assemblies, each including a capacitance and a second switch connected in series with the capacitance and coupling the capacitance to the internal node of the pixel; and

a control circuit configured to:
enable a voltage to be stored in a selected assembly of the assemblies of one of the pixels by closing the second switch of the selected assembly;
control an interruption of a current circulating between the first node and the internal node of the pixel, whi

Assignees

• St Microelectronics Grenoble 2
• St Microelectronics Crolles 2 Sas

Inventors

• Simony Laurent
• Malinge Pierre

Classifications

• H04N25/76 Primary

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/59

  by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title

• H04N25/70 Primary

  SSIS architectures; Circuits associated therewith · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title