Display panel and driving method thereof, and display device

Patent metadata

Field	Value
Publication number	US-11211010-B2
Application number	US-202017125745-A
Country	US
Kind code	B2
Filing date	Dec 17, 2020
Priority date	Oct 15, 2020
Publication date	Dec 28, 2021
Grant date	Dec 28, 2021

Abstract

A display panel and a driving method thereof, and a display device are provided. The display panel includes pixel circuits. Each pixel circuit includes a driving transistor, a data writing circuit, a light-emitting control circuit, a threshold compensation circuit and a bias adjustment circuit. The driving transistor includes a gate electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to the third node, and is configured to generate a driving current. The third node is connected to a light-emitting element through the light-emitting control circuit. The bias adjustment circuit is configured to provide a signal of a bias adjustment signal terminal to the second node under control of a signal of a first scanning signal terminal in such a manner that a bias state of the driving transistor is adjusted.

First claim

What is claimed is:

1. A display panel, comprising:
a plurality of pixel circuits,
wherein each of the plurality of pixel circuits comprises:
a driving transistor configured to generate a driving current, the driving transistor comprising a gate, a first terminal, and a second terminal;
a data writing circuit configured to provide a data signal to the driving transistor;
a light-emitting control circuit connected in series with the driving transistor and a light-emitting element, the light-emitting control circuit configured to control whether the driving current flows through the light-emitting element or not;
a threshold compensation circuit connected in series between the gate and the second terminal of the driving transistor, the threshold compensation circuit configured to detect and self-compensate deviation of a threshold voltage of the driving transistor, wherein the gate of the driving transistor is electrically connected to a first node, the first terminal of the driving transistor is electrically connected to a second node, the second terminal of the driving transistor is electrically connected to a third node, and the third node is connected to the light-emitting element through the light-emitting control circuit; and
a bias adjustment circuit comprising a control terminal electrically connected to a first scanning signal terminal, a first terminal electrically connected to a bias adjustment signal terminal, and a second terminal electrically connected to the second node, wherein the bias adjustment circuit is configured to provide a signal of the bias adjustment signal terminal to the second node under control of a signal of the first scanning signal terminal in such a manner that a bias state of the driving transistor is adjusted.

2. The display panel according to claim 1 , wherein the threshold compensation circuit comprises a first transistor, and wherein the first transistor comprises a control terminal electrically connected to a second scanning signal terminal, a first terminal electrically connected to the third node, and a second terminal electrically connected to the first node.

3. The display panel according to claim 2 , wherein the first transistor comprises an oxide semiconductor.

4. The display panel according to claim 3 , wherein each of a channel length of the driving transistor, a channel length of a transistor of the data writing circuit, a channel length of a transistor of the light-emitting control circuit and a channel length of a transistor of the bias adjustment circuit is smaller than a channel length of the first transistor.

5. The display panel according to claim 1 , wherein a width-to-length ratio of the driving transistor is smaller than each of a width-to-length ratio of a transistor of the data writing circuit, a width-to-length ratio of a transistor of the light-emitting control circuit, a width-to-length ratio of a transistor of the threshold compensation circuit, and a width-to-length ratio of a transistor of the bias adjustment circuit.

6. The display panel according to claim 1 , wherein the data writing circuit comprises a second transistor, and wherein the second transistor comprises a control terminal electrically connected to a third scanning signal terminal, a first terminal electrically connected to a data signal terminal, and a second terminal electrically connected to the second node.

7. The display panel according to claim 1 , wherein the bias adjustment circuit comprises a third transistor, and wherein the third transistor comprises a gate electrically connected to the first scanning signal terminal, a first terminal electrically connected to the bias adjustment signal terminal, and a second terminal electrically connected to the second node.

8. The display panel according to claim 1 , further comprising:
a light-emitting element resetting circuit configured to reset the light-emitting element, wherein the light-emitting element resetting circuit comprises a control terminal electrically connected to a fourth scanning signal terminal, a first terminal electrically connected to a reference voltage terminal, and a second terminal electrically connected to the light-emitting element.

9. The display panel according to claim 8 , wherein the light-emitting element resetting circuit comprises a fourth transistor, wherein the fourth transistor comprises a gate electrically connected to the fourth scanning signal terminal, a first terminal electrically connected to the reference voltage terminal, and a second terminal electrically connected to the light-emitting element.

10. The display panel according to claim 8 , wherein the reference voltage terminal is reused as the bias adjustment signal terminal.

11. The display panel according to claim 8 , wherein the light-emitting control circuit comprises:
a first light-emitting control circuit, wherein the first light-emitting control circuit comprises a control terminal electrically connected to a first light-emitting signal terminal, a first terminal electrically connected to the third node, and a second terminal electrically connected to the light-emitting element; and
a second light-emitting control circuit, wherein the second light-emitting control circuit comprises a control terminal electrically connected to a second light-emitting signal terminal, a first terminal electrically connected to a power signal terminal, and a second terminal electrically connected to the second node.

12. The display panel according to claim 11 , wherein the threshold compensation circuit, the first light-emitting control circuit and the light-emitting element resetting circuit are reused as a gate resetting circuit configured to reset the gate of the driving transistor.

13. The display panel according to claim 12 , wherein the threshold compensation circuit comprises a control terminal electrically connected to a second scanning signal terminal, and wherein the gate resetting circuit is configured to provide a reset signal to the gate of the driving transistor under control of a signal of the second scanning signal terminal, a signal of the fourth scanning signal terminal, and a signal of the first light-emitting signal terminal.

14. The display panel according to claim 11 , wherein the first light-emitting control circuit comprises a fifth transistor, wherein the fifth transistor comprises a gate electrically connected to the first light-emitting signal terminal, a first terminal electrically connected to the third node, and a second terminal electrically connected to the light-emitting element; and
wherein the second light-emitting control circuit comprises a sixth transistor, wherein the sixth transistor comprises a gate electrically connected to the second light-emitting signal terminal, a first terminal electrically connected to the power signal terminal, and a second terminal electrically connected to the second node.

15. The display panel according to claim 1 , comprising:
a plurality of sub-pixels, wherein each of the plurality of sub-pixels comprises a light-emitting element and one of the plurality of pixel circuits, wherein one of the plurality of pixel circuits of one of the plurality of sub-pixels having a first color is connected to a different bias adjustment signal terminal from the bias adjustment signal terminal connected to one of the plurality of pixel circuits of one of the plurality of sub-pixels having a second color, and wherein the first color is different from the second color.

16. The display panel according to claim 15 , wherein the plurality of sub-pixels comprises a red sub-pixel, a green su

Assignees

• Xiamen Tianma Micro Electronics Co Ltd

Inventors

• Yuan Yong

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title