PLL circuit

Patent metadata

Field	Value
Publication number	US-11206029-B2
Application number	US-201916591679-A
Country	US
Kind code	B2
Filing date	Oct 3, 2019
Priority date	Oct 4, 2018
Publication date	Dec 21, 2021
Grant date	Dec 21, 2021

Abstract

A PLL circuit includes a phase comparator, a charge pump, a loop filter, a voltage-controlled oscillator, a frequency divider, a frequency difference determination unit, and an FV characteristics adjustment unit. The frequency difference determination unit determines whether or not a frequency difference between a feedback oscillation signal and an input signal is equal to or smaller than a threshold value. The FV characteristics adjustment unit selects a frequency band in the voltage-controlled oscillator and adjusts FV characteristics.

First claim

What is claimed is:

1. A PLL circuit comprising:
a phase comparator having a first input terminal and a second input terminal for input signals;
a charge pump having an input terminal connected to an output terminal of the phase comparator;
a loop filter having an input terminal connected to an output terminal of the charge pump;
a voltage-controlled oscillator having an input terminal connected to an output terminal of the loop filter, a capacitor group for resonance, and a control terminal of a capacitance value of the capacitor group;
a frequency divider having an input terminal connected to an output terminal of the voltage-controlled oscillator, and an output terminal connected to the second input terminal;
a frequency difference detector having a first input terminal and a second input terminal respectively connected to the first input terminal and the second input terminal of the phase comparator; and
a capacitance adjuster having an input terminal connected to an output terminal of the frequency difference detector, and an output terminal connected to the control terminal for the capacitance value of the voltage-controlled oscillator, wherein the capacitance adjuster adjusts the capacitance value of the voltage-controlled oscillator so that a frequency of an oscillation signal output from the voltage-controlled oscillator has a linear relationship with a frequency or a bit rate of a signal input to the PLL circuit.

2. The PLL circuit according to claim 1 , wherein the voltage-controlled oscillator includes an LC tank circuit.

Assignees

• Thine Electronics Inc

Inventors

• Fujita Yusuke
• Gendai Yuji

Classifications

• H03L7/089

  the phase or frequency detector generating up-down pulses (H03L7/087 takes precedence) · CPC title

• H03L7/0895

  Details of the current generators (H03L7/0893 takes precedence) · CPC title

• H03L7/113

  using frequency discriminator · CPC title

• H03L7/18

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

• H03L7/0995 Primary

  the oscillator comprising a ring oscillator · CPC title