Display panel and manufacturing method thereof

US11204518B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11204518-B2
Application numberUS-201916687542-A
CountryUS
Kind codeB2
Filing dateNov 18, 2019
Priority dateFeb 7, 2019
Publication dateDec 21, 2021
Grant dateDec 21, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel includes an upper display substrate and a lower display substrate. The upper display substrate includes a base substrate, a light shielding pattern, and including an opening part defined therein which corresponds to the pixel region, a color filter overlapped with the pixel region, an encapsulation layer disposed in lower sides of the light shielding pattern and the color filter, a partition wall disposed in a lower side of the encapsulation layer, overlapped with the light shielding region, and including a partition wall opening part defined therein which corresponds to the pixel region, and a quantum dot layer disposed inside the partition wall opening part. The partition wall includes a first layer directly disposed on the bottom surface of the encapsulation layer and a second layer directly disposed on a lower side of the first layer and having a larger optical density than the first layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel comprising: an upper display substrate comprising first, second and third pixel regions, and a light shielding region in a periphery of the first, second and third pixel regions; and a lower display substrate comprising first, second and third display elements respectively corresponding to the first, second and third pixel regions, wherein the upper display substrate comprises: a base substrate; a light shielding pattern disposed on a bottom surface of the base substrate, overlapped with the light shielding region, and comprising first, second and third opening parts defined therein which respectively correspond to the first, second and third pixel regions; first, second and third color filters disposed on the bottom surface of the base substrate and respectively overlapped with the first, second and third pixel regions; a partition wall disposed in a lower side of the first, second and third color filters, overlapped with the light shielding region, and comprising first, second and third partition wall opening parts defined therein which respectively correspond to the first, second and third pixel regions; and first, second and third color control layers respectively disposed in the first, second and third partition wall opening parts, wherein the partition wall comprises a first layer and a second layer directly disposed on a lower side of the first layer and having an optical density greater than that of the first layer, a part of the second layer protrudes downward from the first, second and third color control layers in a cross sectional view, a side of the first layer of the partition wall is exposed from the second layer of the partition wall, and the exposed side of the first layer of the partition wall contacts the first color control layer in the first partition wall opening part. 2. The display panel of claim 1 , wherein the optical density of the second layer is from about 0.15 to about 0.5 when a thickness of the second layer is 1 μm. 3. The display panel of claim 1 , wherein the second layer comprises a hydrophobic region and a hydrophilic region disposed between the hydrophobic region and the first layer. 4. The display panel of claim 3 , wherein the second layer has a thickness of from about 7 μm to about 10 μm. 5. The display panel of claim 4 , wherein the hydrophilic region comprises a base resin and a black coloring agent mixed with the base resin, and the hydrophobic region comprises a hydrophobic agent chemically bonded to the base resin. 6. The display panel of claim 3 , wherein the hydrophobic region has a thickness of from about 30 nm to about 200 nm. 7. The display panel of claim 1 , wherein each of the first, second and third color control layers has a thickness of about 15 μm or larger. 8. The display panel of claim 7 , wherein a height of the partition wall in the light shielding region is higher than that of each of the first, second and third color control layers. 9. The display panel of claim 7 , wherein the first layer has a thickness of about from 5 μm to about 15 μm, and the second layer has a thickness of from about 5 μm to about 10 μm. 10. The display panel of claim 1 , wherein a width of the first layer is about from 10 μm to about 15 μm. 11. The display panel of claim 1 , wherein the second layer is completely overlapped with the first layer in a plan view. 12. The display panel of claim 1 , wherein the light shielding pattern comprises a first light shielding layer of a blue color and a second light shielding layer of a black color, which covers at least a bottom surface of the first light shielding layer. 13. The display panel of claim 1 , wherein each of the first, second and third display elements comprises a first electrode, a second electrode, and an emission layer disposed between the first electrode and the second electrode, and the emission layers of the first, second and third display elements have an integrated shape and generate blue light. 14. The display panel of claim 13 , wherein the first color control layer comprises a first quantum dot configured to convert the blue light into red light, the second color control layer comprises a second quantum dot configured to convert the blue light into green light, and the third color control layer transmits the blue light. 15. A display panel comprising: an upper display substrate comprising a pixel region and a peripheral region adjacent to the pixel region; and a lower display substrate comprising a display element disposed to correspond to the pixel region, wherein the upper display substrate comprises: a base substrate; a light shielding pattern disposed on a bottom surface of the base substrate, overlapped with the peripheral region, and comprising an opening part defined therein which corresponds to the pixel region; a color filter disposed on the bottom surface of the base substrate and overlapped with the pixel region; an encapsulation layer disposed on lower sides of the light shielding pattern and the color filter; a partition wall disposed on a lower side of the encapsulation layer, overlapped with the peripheral region, and comprising a partition wall opening part defined therein which corresponds to the pixel region; and a quantum dot layer disposed in the partition wall opening part, wherein the partition wall comprises a first layer directly disposed on the bottom surface of the encapsulation layer, and a second layer directly disposed in a lower side of the first layer and having a larger optical density than the first layer.

Assignees

Inventors

Classifications

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • Encapsulations · CPC title

  • comprising light absorbing layers, e.g. light-blocking layers · CPC title

  • comprising light absorbing layers, e.g. black layers · CPC title

  • Vertical spacers, e.g. arranged between the sealing arrangement and the OLED · CPC title

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What does patent US11204518B2 cover?
A display panel includes an upper display substrate and a lower display substrate. The upper display substrate includes a base substrate, a light shielding pattern, and including an opening part defined therein which corresponds to the pixel region, a color filter overlapped with the pixel region, an encapsulation layer disposed in lower sides of the light shielding pattern and the color filter…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/133512. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 21 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).